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Fix: control unit was able to support instruction access fault FRISCV #257: Commit fcf3db2 pushed by dpretet
November 20, 2023 20:40 42m 21s privilege
privilege
November 20, 2023 20:40 42m 21s
Fix: control unit was able to support instruction access fault FRISCV #256: Commit 691948c pushed by dpretet
November 20, 2023 20:36 3m 57s privilege
privilege
November 20, 2023 20:36 3m 57s
Fix: control unit was able to support instruction access fault FRISCV #255: Commit 9d6535a pushed by dpretet
November 20, 2023 19:57 11m 31s privilege
privilege
November 20, 2023 19:57 11m 31s
Change: Add define for syscall FRISCV #254: Commit f457a01 pushed by dpretet
November 15, 2023 19:56 50m 50s privilege
privilege
November 15, 2023 19:56 50m 50s
Fix: load misaligned was blocking because counted read or FRISCV #253: Commit bf8ff69 pushed by dpretet
November 14, 2023 19:47 51m 23s privilege
privilege
November 14, 2023 19:47 51m 23s
New: Check access fault in u-mode FRISCV #252: Commit 9515da1 pushed by dpretet
November 14, 2023 16:07 48m 1s privilege
privilege
November 14, 2023 16:07 48m 1s
New: Check access fault in u-mode FRISCV #251: Commit e12d48b pushed by dpretet
November 14, 2023 14:17 31m 52s privilege
privilege
November 14, 2023 14:17 31m 52s
New: Check access fault in u-mode FRISCV #250: Commit 905b6ba pushed by dpretet
November 13, 2023 20:34 50m 8s privilege
privilege
November 13, 2023 20:34 50m 8s
Change: enhance TOR & NAPOT testcase to check every region FRISCV #249: Commit 65230e9 pushed by dpretet
November 2, 2023 19:31 31m 25s privilege
privilege
November 2, 2023 19:31 31m 25s
Fix: WFI didn't manage returns from IDLE properly if mie=0. enchance FRISCV #248: Commit 9e59b70 pushed by dpretet
November 1, 2023 19:35 48m 33s privilege
privilege
November 1, 2023 19:35 48m 33s
Fix: NA4 address mask lead to region greater than 4 bytes FRISCV #247: Commit 55f625b pushed by dpretet
November 1, 2023 17:07 45m 56s privilege
privilege
November 1, 2023 17:07 45m 56s
Add NAPOT region test FRISCV #246: Commit a12eeeb pushed by dpretet
October 30, 2023 21:34 52m 54s privilege
privilege
October 30, 2023 21:34 52m 54s
Change: testbench runs now randomly external IRQ. Add also software IRQ FRISCV #245: Commit 79d8c7a pushed by dpretet
October 29, 2023 19:30 42m 0s privilege
privilege
October 29, 2023 19:30 42m 0s
Change: testbench runs now randomly external IRQ. Add also software IRQ FRISCV #244: Commit ce407a0 pushed by dpretet
October 29, 2023 19:04 17m 30s privilege
privilege
October 29, 2023 19:04 17m 30s
Change: Control now hanldes interrupt as soon they occur. FRISCV #243: Commit 966305b pushed by dpretet
October 27, 2023 18:15 35m 22s privilege
privilege
October 27, 2023 18:15 35m 22s
Fix: Prevent CSR access if illegal CSR instruction occurs FRISCV #242: Commit 8c12593 pushed by dpretet
October 24, 2023 07:01 31m 3s privilege
privilege
October 24, 2023 07:01 31m 3s
Fix: wba test8 updated, checking now WFI with MIE and without MEIE (NOP) FRISCV #241: Commit 95ea57b pushed by dpretet
October 22, 2023 18:12 44m 9s privilege
privilege
October 22, 2023 18:12 44m 9s
New: Connect a scfifo to collect exceptions from processing/memfy, avoid FRISCV #240: Commit 8ba3fca pushed by dpretet
October 21, 2023 21:00 28m 9s privilege
privilege
October 21, 2023 21:00 28m 9s
New: Connect a scfifo to collect exceptions from processing/memfy, avoid FRISCV #239: Commit 9ec808a pushed by dpretet
October 21, 2023 19:57 33m 17s privilege
privilege
October 21, 2023 19:57 33m 17s
Connect PMP/PMA excpetions FRISCV #238: Commit 7452c69 pushed by dpretet
October 9, 2023 05:47 32m 39s privilege
privilege
October 9, 2023 05:47 32m 39s
Connect PMP/PMA excpetions FRISCV #237: Commit 0346e95 pushed by dpretet
October 8, 2023 18:17 29m 5s privilege
privilege
October 8, 2023 18:17 29m 5s
Connect MPU module FRISCV #236: Commit 9490ce0 pushed by dpretet
October 7, 2023 20:03 29m 1s privilege
privilege
October 7, 2023 20:03 29m 1s
New: Add testcase interrupt and WFI (priv_sec_testsuite) FRISCV #235: Commit ffb80f7 pushed by dpretet
October 1, 2023 19:18 28m 33s privilege
privilege
October 1, 2023 19:18 28m 33s
Fix: MPP wasn't swapping between m-mode and u-mode FRISCV #234: Commit 42627e8 pushed by dpretet
September 19, 2023 18:39 34m 25s privilege
privilege
September 19, 2023 18:39 34m 25s
Test 0 to stress out m-mode / u-mode transitions FRISCV #233: Commit 3e26952 pushed by dpretet
September 17, 2023 14:50 38m 20s privilege
privilege
September 17, 2023 14:50 38m 20s