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Populate IO / parameters chapter FRISCV #207: Commit 3583a6a pushed by dpretet
September 5, 2023 20:19 31m 29s master
master
September 5, 2023 20:19 31m 29s
Populate IO / parameters chapter FRISCV #206: Commit d4d1071 pushed by dpretet
September 5, 2023 20:03 4m 31s master
master
September 5, 2023 20:03 4m 31s
Populate IO / parameters chapter FRISCV #205: Commit cc821ce pushed by dpretet
September 5, 2023 20:01 4m 39s master
master
September 5, 2023 20:01 4m 39s
Clean-up hw project mgt FRISCV #204: Commit e1f4b82 pushed by dpretet
September 5, 2023 14:43 30m 34s master
master
September 5, 2023 14:43 30m 34s
Doc update / v1.5.0 FRISCV #203: Commit 528becc pushed by dpretet
September 5, 2023 14:12 33m 50s v1.5.0
v1.5.0
September 5, 2023 14:12 33m 50s
Doc update / v1.5.0 FRISCV #202: Commit 528becc pushed by dpretet
September 5, 2023 14:12 4m 0s master
master
September 5, 2023 14:12 4m 0s
Issue #1: Concurrent read/write access FRISCV #201: Commit 43011d0 pushed by dpretet
September 5, 2023 13:52 23m 31s memfy_opt
memfy_opt
September 5, 2023 13:52 23m 31s
Continue ongoing concurrent request support FRISCV #200: Commit 2397cc7 pushed by dpretet
September 5, 2023 13:51 24m 44s memfy_opt
memfy_opt
September 5, 2023 13:51 24m 44s
Update pusher (read-then-write implementation) FRISCV #199: Commit af4728f pushed by dpretet
September 3, 2023 13:56 30m 31s merge_memfy_opt
merge_memfy_opt
September 3, 2023 13:56 30m 31s
Merge all but cache blocks, AXI_ORDERING=0 FRISCV #198: Commit d7ec088 pushed by dpretet
September 3, 2023 11:41 30m 18s merge_memfy_opt
merge_memfy_opt
September 3, 2023 11:41 30m 18s
Fix: enclose function around ifdef to avoid yosys synthesis error FRISCV #197: Commit 8db0518 pushed by dpretet
September 3, 2023 07:40 29m 7s merge_memfy_opt
merge_memfy_opt
September 3, 2023 07:40 29m 7s
Fix p2 offset wire in cache blocks FRISCV #196: Commit d98d5d0 pushed by dpretet
September 3, 2023 07:20 28m 57s merge_memfy_opt
merge_memfy_opt
September 3, 2023 07:20 28m 57s
Start memfy_opt branch merge FRISCV #195: Commit 1119c06 pushed by dpretet
September 3, 2023 07:05 30m 37s merge_memfy_opt
merge_memfy_opt
September 3, 2023 07:05 30m 37s
Continue ongoing concurrent request support FRISCV #194: Commit eb9b95c pushed by dpretet
September 1, 2023 07:38 33m 57s memfy_opt
memfy_opt
September 1, 2023 07:38 33m 57s
Change: rework cache blocks to have fully independant port for FRISCV #193: Commit 9d9e136 pushed by dpretet
August 20, 2023 12:53 35m 20s memfy_opt
memfy_opt
August 20, 2023 12:53 35m 20s
Fix syn fileset FRISCV #192: Commit 7e0287b pushed by dpretet
August 14, 2023 12:47 37m 40s memfy_opt
memfy_opt
August 14, 2023 12:47 37m 40s
Fix syn fileset FRISCV #191: Commit c19926b pushed by dpretet
August 13, 2023 14:29 35m 43s memfy_opt
memfy_opt
August 13, 2023 14:29 35m 43s
New: Enhance r/w ordering if addresses targeted are not the same FRISCV #190: Commit 91a1ba1 pushed by dpretet
August 13, 2023 14:18 34m 23s memfy_opt
memfy_opt
August 13, 2023 14:18 34m 23s
Fix dCache testbench to wait for 1000 cycles at a tc execution End FRISCV #189: Commit a362e59 pushed by dpretet
July 27, 2023 14:47 32m 11s master
master
July 27, 2023 14:47 32m 11s
Fix iCache testbench FRISCV #188: Commit 16d0a09 pushed by dpretet
July 27, 2023 09:18 32m 51s master
master
July 27, 2023 09:18 32m 51s
New: Optimize OoO completion stage to bypass internal RAMs is tag to FRISCV #187: Commit 1a1a4f4 pushed by dpretet
July 27, 2023 07:25 34m 31s master
master
July 27, 2023 07:25 34m 31s