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Added MAC-10M + PHY for CH32V20x #16

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1 change: 1 addition & 0 deletions data/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
- CH32V305*, CH32V307*
- CH32F205RB, CH32F207VC
- x0: CH32X0
- 10m: ethernet 10M MAC + PHY

## Peripherals

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1 change: 1 addition & 0 deletions data/chips/CH32V203RBT6.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@ cores:
- "../peripherals/FV2x_V3x_USBD.yaml"
- "../peripherals/FV2x_V3x_USBFS.yaml"
- "../peripherals/FV2x_V3x_CAN1.yaml"
- "../peripherals/FV2x_ETH10.yaml"

include_interrupts: "../interrupts/CH32V2_D8.yaml"
include_dma_channels:
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1 change: 1 addition & 0 deletions data/chips/CH32V208GBU6.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@ cores:
- "../peripherals/FV2x_V3x_USBD.yaml"
- "../peripherals/FV2x_V3x_USBFS.yaml"
- "../peripherals/FV2x_V3x_CAN1.yaml"
- "../peripherals/FV2x_ETH10.yaml"

include_interrupts: "../interrupts/CH32V2_D8.yaml"
include_dma_channels:
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1 change: 1 addition & 0 deletions data/chips/CH32V208RBT6.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ cores:
- "../peripherals/FV2x_V3x_USBD.yaml"
- "../peripherals/FV2x_V3x_USBFS.yaml"
- "../peripherals/FV2x_V3x_CAN1.yaml"
- "../peripherals/FV2x_ETH10.yaml"

include_interrupts: "../interrupts/CH32V2_D8.yaml"
include_dma_channels:
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1 change: 1 addition & 0 deletions data/chips/CH32V208WBU6.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ cores:
- "../peripherals/FV2x_V3x_USBD.yaml"
- "../peripherals/FV2x_V3x_USBFS.yaml"
- "../peripherals/FV2x_V3x_CAN1.yaml"
- "../peripherals/FV2x_ETH10.yaml"

include_interrupts: "../interrupts/CH32V2_D8.yaml"
include_dma_channels:
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30 changes: 30 additions & 0 deletions data/peripherals/FV2x_ETH10.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
# Ethernet MAC-10M + PHY
- name: ETH
address: 0x40028000
registers:
kind: eth
version: 10m
block: ETH
rcc:
bus_clock: PCLK1
kernel_clock: HCLK
enable:
# FIXME! definitively incorrect, but ch32-data currently needs these fields.
# Since the ETHMACEN field is reserved to the 10/100/1G MAC, which is mutually exclusive
# with the MAC-10M, it's probably safest to give this field.
register: AHBPCENR
field: ETHMACEN
exten:
# Contrary to other peripherals, the Ethernet MAC is enabled from register EXTEN_CTR
enable:
register: EXTEN_CTR
field: ETH10M
pins:
- pin: PC6
signal: ETH_RXP
- pin: PC7
signal: ETH_RXN
- pin: PC8
signal: ETH_TXP
- pin: PC9
signal: ETH_TXN
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