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2024.2.1 #1127

Merged
merged 18 commits into from
Jan 15, 2025
Merged

2024.2.1 #1127

merged 18 commits into from
Jan 15, 2025

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Signed-off-by: Chris Lavin <[email protected]>
eddieh-xlnx and others added 17 commits January 2, 2025 09:53
…1129)

* [DesignTools] foreachConnectedBELPin() to walk through Versal IMRs

Signed-off-by: Eddie Hung <[email protected]>

* Call recursively

Signed-off-by: Eddie Hung <[email protected]>

* [TestDesignTools] Add testGetConnected{Cells,BELPins}Versal()

Signed-off-by: Eddie Hung <[email protected]>

* [RouterHelper] invertPossibleGndPinsToVccPins() to use fixed

DesignTools.getConnectedCells()

Signed-off-by: Eddie Hung <[email protected]>

* [DesignTools] getAllRoutedSitePinsFromPhysicalPin() to use IMR method

Signed-off-by: Eddie Hung <[email protected]>

* Fix broken expected result!

Signed-off-by: Eddie Hung <[email protected]>

* Tidy up

Signed-off-by: Eddie Hung <[email protected]>

* Update test/src/com/xilinx/rapidwright/design/TestDesignTools.java

Signed-off-by: eddieh-xlnx <[email protected]>

* Update src/com/xilinx/rapidwright/design/DesignTools.java

Signed-off-by: eddieh-xlnx <[email protected]>

* Apply suggestions from code review

Signed-off-by: eddieh-xlnx <[email protected]>

Signed-off-by: Eddie Hung <[email protected]>

* [RouterHelper] invertPossibleGndPinsToVccPins() fallback through IMRs

Signed-off-by: Eddie Hung <[email protected]>

---------

Signed-off-by: Eddie Hung <[email protected]>
Signed-off-by: eddieh-xlnx <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
* [LUTTools] Versal fixes

Signed-off-by: Eddie Hung <[email protected]>

* [LUTTools] Cleanup

Signed-off-by: Eddie Hung <[email protected]>

* [TestLUTTools] Add testSwapMultipleLutPinsVersal()

Signed-off-by: Eddie Hung <[email protected]>

* [LUTTools] Revert to using updated DesignTools.getConnectedCells()

Signed-off-by: Eddie Hung <[email protected]>

* Remove unused import

Signed-off-by: Eddie Hung <[email protected]>

---------

Signed-off-by: Eddie Hung <[email protected]>
* Tests for Versal BEL flags and site unrouter

Signed-off-by: Chris Lavin <[email protected]>

* rc2 compiled with this PR

Signed-off-by: Chris Lavin <[email protected]>

* rc4, compiled with EDIFNet.getPortInsts() API change

Signed-off-by: Chris Lavin <[email protected]>

---------

Signed-off-by: Chris Lavin <[email protected]>
* Test for SiteInst.isEmpty()

Signed-off-by: Chris Lavin <[email protected]>

* Restore import order

Signed-off-by: Chris Lavin <[email protected]>

---------

Signed-off-by: Chris Lavin <[email protected]>
* Override switch for Advanced Flow flag; adds test

Signed-off-by: Chris Lavin <[email protected]>

* Change test to reflect DCP load behavior

Signed-off-by: Chris Lavin <[email protected]>

* rc5

Signed-off-by: Chris Lavin <[email protected]>

* debug

Signed-off-by: Chris Lavin <[email protected]>

* Fix internal test failures

Signed-off-by: Chris Lavin <[email protected]>

* Add debug

Signed-off-by: Chris Lavin <[email protected]>

* Revert

Signed-off-by: Chris Lavin <[email protected]>

---------

Signed-off-by: Chris Lavin <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
@clavin-xlnx clavin-xlnx marked this pull request as ready for review January 15, 2025 22:18
@clavin-xlnx clavin-xlnx merged commit 5dc47ce into master Jan 15, 2025
14 checks passed
@clavin-xlnx clavin-xlnx deleted the 2024.2.1 branch January 15, 2025 22:21
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2 participants