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misc: minor cleanup
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Ryp committed Jun 24, 2024
1 parent 176524f commit 3e43008
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Showing 3 changed files with 10 additions and 13 deletions.
9 changes: 2 additions & 7 deletions src/gb/cpu.zig
Original file line number Diff line number Diff line change
Expand Up @@ -326,16 +326,11 @@ pub const MMIO = packed struct {
},
};

pub const MMIOSizeBytes = 256;

comptime {
assert(@offsetOf(MMIO, "apu") == 0x10);
assert(@offsetOf(MMIO, "ppu") == 0x40);
assert(@offsetOf(MMIO, "PCM34") == 0x77);
assert(@sizeOf(MMIO) == MMIOSizeBytes);
}

pub const MMIOSizeBytes = 256;

pub const TClockPeriod = 4 * 1024 * 1024;
pub const DIVClockPeriod = 16 * 1024;

pub const DMACopyByteCount = 160;
9 changes: 4 additions & 5 deletions src/gb/execution.zig
Original file line number Diff line number Diff line change
Expand Up @@ -164,6 +164,8 @@ fn step_timer(gb: *cpu.GBState, clock_falling_edge_mask: u64) void {
}
}

const DMACopyByteCount = 160;

fn step_dma(gb: *cpu.GBState, t_cycle_count: u8) void {
const scope = tracy.trace(@src());
defer scope.end();
Expand All @@ -174,7 +176,7 @@ fn step_dma(gb: *cpu.GBState, t_cycle_count: u8) void {
// Copy 1 byte per M-cycle
const byte_count_to_copy_max = t_cycle_count / 4;
const copy_offset_begin = gb.dma_current_offset;
const copy_offset_end = @min(gb.dma_current_offset + byte_count_to_copy_max, cpu.DMACopyByteCount);
const copy_offset_end = @min(gb.dma_current_offset + byte_count_to_copy_max, DMACopyByteCount);

for (copy_offset_begin..copy_offset_end) |offset| {
oam_sprites_mem[offset] = load_memory_u8(gb, dma_src_address + @as(u16, @intCast(offset)));
Expand All @@ -183,7 +185,7 @@ fn step_dma(gb: *cpu.GBState, t_cycle_count: u8) void {
// Update state
gb.dma_current_offset = copy_offset_end;

if (copy_offset_end == cpu.DMACopyByteCount) {
if (copy_offset_end == DMACopyByteCount) {
gb.dma_active = false;
}
}
Expand Down Expand Up @@ -1190,9 +1192,6 @@ const TAC = 0x07; // Timer Control (R/W)
// PPU Region A
const DMA = 0x46; // DMA Transfer and Start Address (W)
// PPU Region B
// KEY0 = 0x4C, // Controls DMG mode and PGB mode
// KEY1 = 0x4D, // CGB Mode Only - Prepare Speed Switch
// VBK = 0x4F, // CGB Mode Only - VRAM Bank
// BANK = 0x50, // Write to disable the boot ROM mapping
// HDMA1 = 0x51, // CGB Mode Only - New DMA Source, High
// HDMA2 = 0x52, // CGB Mode Only - New DMA Source, Low
Expand Down
5 changes: 4 additions & 1 deletion src/gb/ppu.zig
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ pub fn step_ppu(gb: *cpu.GBState, t_cycle_count: u8) void {
pub const MMIO_OffsetABegin = LCDC;
pub const MMIO_OffsetAEndInclusive = LYC;
pub const MMIO_OffsetBBegin = BGP;
pub const MMIO_OffsetBEndInclusive = WX;
pub const MMIO_OffsetBEndInclusive = VBK;

pub fn store_mmio_u8(ppu: *PPUState, mmio: *MMIO, mmio_bytes: []u8, offset: u8, value: u8) void {
switch (offset) {
Expand Down Expand Up @@ -511,3 +511,6 @@ const OBP0 = 0x48; // Object Palette 0 Data (R/W) - Non CGB Mode Only
const OBP1 = 0x49; // Object Palette 1 Data (R/W) - Non CGB Mode Only
const WY = 0x4A; // Window Y Position (R/W)
const WX = 0x4B; // Window X Position minus 7 (R/W)
const KEY0 = 0x4C; // Controls DMG mode and PGB mode
const KEY1 = 0x4D; // CGB Mode Only - Prepare Speed Switch
const VBK = 0x4F; // CGB Mode Only - VRAM Bank

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