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Since the constraint `m` should assume non-xcvmem specific operands,
we redefined TARGET_MEM_CONSTRAINT and defined 'm' to exclude XCVmem
specific operands.
Constraint `CVmp` defines addresses for post modify operands.
Constraint `CVmr` defines addresses for reg + reg operands.
Files Changed:
* gcc/config/riscv/predicates.md (mem_post_inc): Prevent DI and
DF mode mem.
(mem_plus_reg): Likewise.
* gcc/config/riscv/constraints.md: Add new constraints `m`,
`CVmp` and `CVmr`.
* gcc/config/riscv/riscv.md: Remove constraint `am`.
* gcc/config/riscv/riscv.h: Redefine TARGET_MEM_CONSTRAINT to
`w`.
* gcc/testsuite/gcc.target/riscv/cv-mem-compile-1.c: New test.
* gcc/testsuite/gcc.target/riscv/cv-mem-compile-2.c: Likewise.
* gcc/testsuite/gcc.target/riscv/cv-mem-compile-3.c: Likewise.- Loading branch information
Mary Bennett
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Nov 2, 2023
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,17 @@ | ||
| /* { dg-do compile } */ | ||
| /* { dg-options "-march=rv32i_xcvmem -mabi=ilp32 -g -O2" } */ | ||
| /* { dg-skip-if "" { *-*-* } { "-O0" } { "" } } */ | ||
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| /* Test for illegal generation of pattern: `(mem:DF (plus:SI (reg reg)))`. | ||
| */ | ||
|
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||
| struct { | ||
| double a[3]; | ||
| } * b; | ||
| int c; | ||
|
|
||
| int | ||
| foo (void) | ||
| { | ||
| b[0].a[c] -= b[0].a[c]; | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,18 @@ | ||
| /* { dg-do compile } */ | ||
| /* { dg-options "-march=rv32i_xcvmem -mabi=ilp32 -g -O2" } */ | ||
| /* { dg-skip-if "" { *-*-* } { "-O0" } { "" } } */ | ||
|
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||
| /* Test for illegal pattern: `(mem:DF (post_modify:SI (reg reg)))`. | ||
| */ | ||
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| int bar (double); | ||
|
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||
| int | ||
| foo (void) | ||
| { | ||
| double *b; | ||
| int c = 0; | ||
| for (;; c++) | ||
| bar (b[c]); | ||
| } | ||
|
|
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,26 @@ | ||
| /* { dg-do compile } */ | ||
| /* { dg-options "-march=rv32i_xcvmem -mabi=ilp32 -g -O2 -Wno-int-conversion" } */ | ||
| /* { dg-skip-if "" { *-*-* } { "-O0" } { "" } } */ | ||
|
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||
| /* Test for illegal assembly instruction `lbu reg,reg(reg)`. | ||
| */ | ||
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| int a; | ||
| int bar (char); | ||
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| int | ||
| foo (void) | ||
| { | ||
| short *d; | ||
| char *e = (char *)foo; | ||
| for (;;) { | ||
| char c = d++; | ||
| bar (c); | ||
| short b = e[0] + b; | ||
| if (b) | ||
| a = 5; | ||
| e += 2; | ||
| } | ||
| } | ||
|
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| /* { dg-final { scan-assembler-not "lbu\t\[a-z\]\[0-99\],\[a-z\]\[0-99\]\\(\[a-z\]\[0-99\]\\)" } } */ |