xtensa: add rt500_adsp toolchain

This adds the Xtensa toolchain for Tensilica Fusion F1 DSP found on NXP RT500 MCU family. Signed-off-by: Daniel Baluta <[email protected]>
zephyrproject-rtos · Aug 25, 2023 · 7d1b95e · 7d1b95e
1 parent 8d9b4fe
commit 7d1b95e
Show file tree

Hide file tree

Showing 14 changed files with 132,488 additions and 1 deletion.
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -57,6 +57,7 @@ on:
         - xtensa-intel_tgl_adsp_zephyr-elf
         - xtensa-nxp_imx_adsp_zephyr-elf
         - xtensa-nxp_imx8m_adsp_zephyr-elf
+        - xtensa-nxp_rt500_adsp_zephyr-elf
         - xtensa-sample_controller_zephyr-elf
       debug:
         description: 'Debug'
@@ -165,6 +166,7 @@ jobs:
             xtensa-intel_tgl_adsp_zephyr-elf)     build_target_xtensa_intel_tgl_adsp_zephyr_elf="y";;
             xtensa-nxp_imx_adsp_zephyr-elf)       build_target_xtensa_nxp_imx_adsp_zephyr_elf="y";;
             xtensa-nxp_imx8m_adsp_zephyr-elf)     build_target_xtensa_nxp_imx8m_adsp_zephyr_elf="y";;
+            xtensa-nxp_rt500_adsp_zephyr-elf)     build_target_xtensa_nxp_rt500_adsp_zephyr_elf="y";;
             xtensa-sample_controller_zephyr-elf)  build_target_xtensa_sample_controller_zephyr_elf="y";;
           esac
 
@@ -201,6 +203,7 @@ jobs:
           build_target_xtensa_intel_tgl_adsp_zephyr_elf="y"
           build_target_xtensa_nxp_imx_adsp_zephyr_elf="y"
           build_target_xtensa_nxp_imx8m_adsp_zephyr_elf="y"
+          build_target_xtensa_nxp_rt500_adsp_zephyr_elf="y"
           build_target_xtensa_sample_controller_zephyr_elf="y"
         fi
 
@@ -277,6 +280,7 @@ jobs:
         [ "${build_target_xtensa_intel_tgl_adsp_zephyr_elf}" == "y" ]     && MATRIX_TARGETS+='"xtensa-intel_tgl_adsp_zephyr-elf",'
         [ "${build_target_xtensa_nxp_imx_adsp_zephyr_elf}" == "y" ]       && MATRIX_TARGETS+='"xtensa-nxp_imx_adsp_zephyr-elf",'
         [ "${build_target_xtensa_nxp_imx8m_adsp_zephyr_elf}" == "y" ]     && MATRIX_TARGETS+='"xtensa-nxp_imx8m_adsp_zephyr-elf",'
+        [ "${build_target_xtensa_nxp_rt500_adsp_zephyr_elf}" == "y" ]     && MATRIX_TARGETS+='"xtensa-nxp_rt500_adsp_zephyr-elf",'
         [ "${build_target_xtensa_sample_controller_zephyr_elf}" == "y" ]  && MATRIX_TARGETS+='"xtensa-sample_controller_zephyr-elf",'
         MATRIX_TARGETS+=']'
 
@@ -1537,6 +1541,9 @@ jobs:
             xtensa-nxp_imx8m_adsp_zephyr-elf)
               PLATFORM_ARGS+="-p nxp_adsp_imx8m "
               ;;
+            xtensa-nxp_rt500_adsp_zephyr-elf)
+              PLATFORM_ARGS+="-p nxp_adsp_rt500 "
+              ;;
             xtensa-sample_controller_zephyr-elf)
               PLATFORM_ARGS+="-p qemu_xtensa "
               ;;

diff --git a/README.md b/README.md
@@ -15,7 +15,7 @@ The toolchains for the following target architectures are supported:
 - SPARC (32-bit and 64-bit; SPARC V8, SPARC V9)
 - x86 (32-bit and 64-bit)
 - Xtensa (sample_controller, intel_ace15_mtpm, intel_tgl_adsp,
-  nxp_imx_adsp, nxp_imx8m_adsp, espressif_esp32, espressif_esp32s2,
+  nxp_imx_adsp, nxp_imx8m_adsp, nxp_rt500_adsp, espressif_esp32, espressif_esp32s2,
   espressif_esp32s3)
 
 The following host tools are available as part of the Zephyr SDK:

diff --git a/configs/xtensa-nxp_rt500_adsp_zephyr-elf.config b/configs/xtensa-nxp_rt500_adsp_zephyr-elf.config
@@ -0,0 +1,9 @@
+CT_CONFIG_VERSION="3"
+CT_EXPERIMENTAL=y
+CT_OVERLAY_LOCATION="overlays"
+CT_OVERLAY_NAME="nxp_rt500_adsp"
+CT_ARCH_XTENSA=y
+CT_XTENSA_CUSTOM=y
+CT_TARGET_VENDOR="nxp_rt500_adsp_zephyr"
+CT_TARGET_CFLAGS="-ftls-model=local-exec"
+CT_CC_GCC_CONFIG_TLS=n