Fix to not allow Shake128/256 with Xilinx AFALG #7708
Merged
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Description
Fix to not allow Shake128/256 with Xilinx AFALG. Cleanup the Shake disable logic to allow forcing off with
WOLFSSL_NO_SHAKE128
andWOLFSSL_NO_SHAKE256
.Testing
Xilinx UltraScale+ MPSoC (ZCU102) Cortex A53 @ 1.2 GHz
Note 1: Using maximum benchmark block size of 16448 bytes because of issues with AFALG memory on PetaLinux.
Note 2: The bare-metal and FreeRTOS performance of XilSecure is better than with PetaLinux due to driver overhead.
wolf Assembly Speedups for ARMv8
XilSecure (Crypto Hardware)
https://docs.amd.com/v/u/en-US/wp512-accel-crypto
Checklist