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Fixes for NXP T1024 with Integrity OS #401

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merged 11 commits into from
Feb 12, 2024
Merged

Fixes for NXP T1024 with Integrity OS #401

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868c9e3
Fixes for NXP T1024 with Integrity OS. Adds additional FDT fixups for…
dgarske Jan 24, 2024
c6d961e
Improve PCIe code.
dgarske Jan 26, 2024
38f88b7
Fix for T1024 CPLD.
dgarske Feb 1, 2024
e33f51c
Improvements for CPLD. Patch for PCIe from TigerLake.
dgarske Feb 1, 2024
90c5ada
CPLD Fixes. Add MRAM support.
dgarske Feb 1, 2024
98ed8e1
Cleanups.
dgarske Feb 1, 2024
b8c68a6
Fix for T1024 CPU core clock calculation.
dgarske Feb 5, 2024
aa9e274
Adjust NXP T1024 flash layout, so existing device tree location does …
dgarske Feb 6, 2024
9dcd7b0
Fix for eSDHC to update FDT with status and clock. Fix eSPI base addr…
dgarske Feb 6, 2024
bed1e7d
Added NXP T1024 mEMAC, MDIO and PHY setup. Setting PHY fixes Integrit…
dgarske Feb 9, 2024
f7c1b71
Peer review feedback.
dgarske Feb 12, 2024
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1 change: 1 addition & 0 deletions arch.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -425,6 +425,7 @@ ifeq ($(TARGET),nxp_t1024)
LDFLAGS+=-Wl,--as-needed # remove weak functions not used
OBJS+=src/boot_ppc_mp.o # support for spin table
OBJS+=src/fdt.o
OBJS+=src/pci.o
UPDATE_OBJS:=src/update_ram.o
ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
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10 changes: 5 additions & 5 deletions config/examples/nxp-t1024.config
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Expand Up @@ -37,15 +37,15 @@ WOLFBOOT_ORIGIN=0xEFF40000
# wolfBoot partition size (custom)
BOOTLOADER_PARTITION_SIZE=0xC0000

# Application Partition Size
WOLFBOOT_PARTITION_SIZE?=0x01E00000
# Application Partition Size (15MB)
WOLFBOOT_PARTITION_SIZE?=0xF00000
# Location in Flash for Application Partition
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xEE000000
# Load Partition to RAM Address
WOLFBOOT_LOAD_ADDRESS?=0x70000000

# Location in Flash for Update Partition
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xEC200000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xEEF00000

# Location of temporary sector used during updates
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xEC0F0000
Expand All @@ -58,8 +58,8 @@ WOLFBOOT_STAGE1_FLASH_ADDR=0xEFFFC000
WOLFBOOT_STAGE1_LOAD_ADDR=0x7FF00000

# DTS (Device Tree)
WOLFBOOT_DTS_BOOT_ADDRESS?=0xEC020000
WOLFBOOT_DTS_UPDATE_ADDRESS?=0xEC040000
WOLFBOOT_DTS_BOOT_ADDRESS?=0xEC800000
WOLFBOOT_DTS_UPDATE_ADDRESS?=0xEC820000
# DTS Load to RAM Address
WOLFBOOT_LOAD_DTS_ADDRESS?=0x7F100000

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17 changes: 10 additions & 7 deletions docs/Targets.md
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Expand Up @@ -1375,13 +1375,16 @@ Default NOR Flash Memory Layout (64MB) (128KB block, 1K page)
| Description | Address | Size |
| ----------------- | ---------- | ------------------- |
| RCW | 0xEC000000 | 0x00020000 (128 KB) |
| Primary (FDT) | 0xEC020000 | 0x00020000 (128 KB) |
| Update (FDT) | 0xEC040000 | 0x00020000 (128 KB) |
| Free | 0xEC060000 | 0x00090000 (576 KB) |
| Free | 0xEC020000 | 0x000D0000 (832 KB) |
| Swap Sector | 0xEC0F0000 | 0x00010000 ( 64 KB) |
| Free | 0xEC100000 | 0x00100000 ( 1 MB) |
| Update (OS) | 0xEC200000 | 0x01E00000 ( 30 MB) |
| Application (OS) | 0xEE000000 | 0x01E00000 ( 30 MB) |
| Free | 0xEC100000 | 0x00700000 ( 7 MB) |
| FDT (Primary) | 0xEC800000 | 0x00020000 (128 KB) |
| FDT (Update) | 0xEC820000 | 0x00020000 (128 KB) |
| Free | 0xEC840000 | 0x008A0000 ( 8MB) |
| Ethenet Config | 0xED0E0000 | 0x00000400 ( 1 KB) |
| Free | 0xED100000 | 0x00F00000 ( 15 MB) |
| Application (OS) | 0xEE000000 | 0x00F00000 ( 15 MB) |
| Update (OS) | 0xEEF00000 | 0x00F00000 ( 15 MB) |
| QUICC | 0xEFE00000 | 0x00100000 ( 1 MB) |
| DPAA (FMAN) | 0xEFF00000 | 0x00020000 (128 KB) |
| wolfBoot | 0xEFF40000 | 0x000BC000 (752 KB) |
Expand Down Expand Up @@ -1904,7 +1907,7 @@ make
# The next script needs to be run from wolboot root folder and assumes your
# kernel is in th root folder, named bzImage
# If this is not the case, change the path in the script accordingly
tools/x86_64/qemu/make_hd.sh
tools/x86_fsp/qemu/make_hd.sh

# Run wolfBoot + Linux in qemu
tools/scripts/qemu64/qemu64.sh
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8 changes: 4 additions & 4 deletions hal/nxp_p1021.c
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Expand Up @@ -975,10 +975,10 @@ void hal_early_init(void)
static int hal_pcie_init(void)
{
/* Map LAW for PCIe */
set_law(0, 0, CONFIG_SYS_PCIE1_MEM_PHYS, LAW_TRGT_PCIE1, LAW_SIZE_512MB, 1),
set_law(1, 0, CONFIG_SYS_PCIE1_IO_PHYS, LAW_TRGT_PCIE1, LAW_SIZE_64KB, 1),
set_law(2, 0, CONFIG_SYS_PCIE2_MEM_PHYS, LAW_TRGT_PCIE2, LAW_SIZE_512MB, 1),
set_law(3, 0, CONFIG_SYS_PCIE2_IO_PHYS, LAW_TRGT_PCIE2, LAW_SIZE_64KB, 1),
set_law(0, 0, CONFIG_SYS_PCIE1_MEM_PHYS, LAW_TRGT_PCIE1, LAW_SIZE_512MB, 1);
set_law(1, 0, CONFIG_SYS_PCIE1_IO_PHYS, LAW_TRGT_PCIE1, LAW_SIZE_64KB, 1);
set_law(2, 0, CONFIG_SYS_PCIE2_MEM_PHYS, LAW_TRGT_PCIE2, LAW_SIZE_512MB, 1);
set_law(3, 0, CONFIG_SYS_PCIE2_IO_PHYS, LAW_TRGT_PCIE2, LAW_SIZE_64KB, 1);

/* Map TLB for PCIe */
set_tlb(1, 2, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS, 0,
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