Added cmdline argument for xelab options

trosenkranz · Nov 15, 2023 · fea2a5a · fea2a5a
1 parent 84b8803
commit fea2a5a
Showing 1 changed file with 5 additions and 2 deletions.
diff --git a/bin/runSVUnit b/bin/runSVUnit
@@ -48,6 +48,7 @@ my $wavedrom;
 my @directory;
 my @simargs;
 my @compileargs;
+my @elaborationargs;
 my $outdir = ".";
 my $clean;
 my $vhdlfile;
@@ -58,13 +59,14 @@ my $help;
 
 sub usage () {
   print "Usage:  runSVUnit [-s|--sim <simulator> -l|--log <log> -d|--define <macro> -f|--filelist <file> -U|-uvm -m|-mixedsim <vhdlfile>\n";
-  print "                  -r|--r_arg <option> -c|--c_arg <option> -o|--out <dir> -t|--test <test> --filter <filter>]\n";
+  print "                  -r|--r_arg <option> -c|--c_arg <option> -e|--e_arg <option> -o|--out <dir> -t|--test <test> --filter <filter>]\n";
   print "  -s|--sim <simulator>     : simulator is either of questa, modelsim, riviera, ius, xcelium, vcs, dsim, verilator\n";
   print "  -l|--log <log>           : simulation log file (default: run.log)\n";
   print "  -d|--define <macro>      : appended to the command line as +define+<macro>\n";
   print "  -f|--filelist <file>     : some verilog file list\n";
   print "  -r|--r_arg <option>      : specify additional runtime options\n";
   print "  -c|--c_arg <option>      : specify additional compile options\n";
+  print "  -e|--e_arg <option>      : specify additional elaboration options for Xilinx Vivado\n";
   print "  -U|--uvm                 : run SVUnit with UVM\n";
   print "  -o|--out                 : output directory for tmp and simulation files\n";
   print "  -t|--test                : specifies a unit test to run (multiple can be given)\n";
@@ -101,6 +103,7 @@ GetOptions("l|log=s" => \$logfile,
            "U|uvm" => \$uvm,
            "r|r_arg=s" => \@simargs,
            "c|c_arg=s" => \@compileargs,
+           "e|e_arg=s" => \@elaborationargs,
            "o|out=s" => \$outdir,
            "m|mixedsim=s" => \$vhdlfile,
            "t|test=s{,}" => \@tests,
@@ -217,7 +220,7 @@ if ($simulator eq "modelsim" or $simulator eq "riviera") {
   }
   $cmd .= qq! && obj_dir/Vtestrunner $verilator_simargs 2>&1 | tee $logfile !;
 } elsif ($simulator eq "xsim") {
-  $cmd .= qq! @compileargs && xelab testrunner && xsim @simargs --R --log $logfile testrunner!;
+  $cmd .= qq! @compileargs && xelab testrunner @elaborationargs && xsim @simargs --R --log $logfile testrunner!;
 } else {
   $cmd .= " @compileargs @simargs -top testrunner";
 }