Merge branch 'gcc11'.

INSTALL.md

@@ -29,6 +29,8 @@ Values for `RELEASE` are as below:
 | FSF GCC 7 | `gcc7` |
 | FSF GCC 8 | `gcc8` |
 | FSF GCC 9 | `gcc8` |
+| FSF GCC 10 | `gcc8` |
+| FSF GCC 11 | `gcc11` |
 | GNAT GPL 2016 | `gcc6` |
 | GNAT GPL 2017 | `gnat-gpl-2017` |
 | GNAT CE 2018 | `gcc8` |

arduino-due/adainclude/interrupt_vectors.s

@@ -0,0 +1,71 @@
+        @ Copyright (C) 2021 Free Software Foundation, Inc.
+
+        @ This file is part of the Cortex GNAT RTS project. This file is
+	@ free software; you can redistribute it and/or modify it under
+	@ terms of the GNU General Public License as published by the Free
+	@ Software Foundation; either version 3, or (at your option) any
+	@ later version. This file is distributed in the hope that it will
+	@ be useful, but WITHOUT ANY WARRANTY; without even the implied
+	@ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+	@ As a special exception under Section 7 of GPL version 3, you are
+	@ granted additional permissions described in the GCC Runtime
+	@ Library Exception, version 3.1, as published by the Free Software
+	@ Foundation.
+
+	@ You should have received a copy of the GNU General Public License
+	@ and a copy of the GCC Runtime Library Exception along with this
+	@ program; see the files COPYING3 and COPYING.RUNTIME respectively.
+	@ If not, see <http://www.gnu.org/licenses/>.
+
+	@ This is the Vector Table, described in 11057 23-mar-15, Chapter 10.6.4
+
+	@ The capitalized handlers are defined in startup.adb, using
+	@ weak symbols (they can't be defined here, unlike _fault, or
+	@ the linker satisfies the requirement immediately).
+
+	.syntax unified
+	.cpu cortex-m4
+	.thumb
+
+	.text
+        .section .isr_vector
+        .align 2
+	.global _isr_vector
+        .type _isr_vector, %object
+
+_isr_vector:
+        /* Startup */
+        .word   _estack            /* top of stack, from linker script. */
+        .word   program_initialization  /* entry point */
+
+	/* Cortex-M core interrupts */
+	.word   _fault             /* -14 NMI. */
+	.word   HardFault_Handler  /* -13 Hard fault. */
+	.word   _fault             /* -12 Mem manage. */
+	.word   _fault             /* -11 Bus fault. */
+	.word   _fault             /* -10 Usage fault. */
+	.word   _fault             /* -9 reserved. */
+	.word   _fault             /* -8 reserved. */
+	.word   _fault             /* -7 reserved. */
+	.word   _fault             /* -6 reserved. */
+	.word   SVC_Handler        /* -5 SVCall. */
+	.word   _fault             /* -4 Breakpoint. */
+	.word   _fault             /* -3 reserved. */
+	.word   PendSV_Handler     /* -2 PendSV. */
+	.word   SysTick_Handler    /* -1 Systick. */
+
+	/* MCU interrupts */
+        .rept 45                   /* 0 .. 44, standard */
+        .word IRQ_Handler
+        .endr
+
+        .size _isr_vector, . - _isr_vector
+
+        .section .text
+
+        .thumb_func
+        .type _fault, %function
+_fault: b _fault
+        .size _fault, . - _fault
+

arduino-due/adainclude/startup-set_up_clock.adb

@@ -1,4 +1,4 @@
---  Copyright (C) 2016, 2020 Free Software Foundation, Inc.
+--  Copyright (C) 2016-2021 Free Software Foundation, Inc.
 --
 --  This file is part of the Cortex GNAT RTS project. This file is
 --  free software; you can redistribute it and/or modify it under
@@ -45,23 +45,27 @@ begin
    end;
 
    --  Select the Main Clock
-   PMC_Periph.CKGR_MOR := (KEY      => 16#37#,
-                           MOSCXTEN => 1,     -- main crystal oscillator enable
-                           MOSCRCEN => 1,     -- main on-chip rc osc. enable
-                           MOSCXTST => 8,     -- startup time
-                           others   => <>);
-   --  XXX shouldn't this give 4 MHz, not 12?
+   declare
+      CKGR_MOR : constant CKGR_MOR_Register :=
+        (KEY      => 16#37#,
+         MOSCXTEN => 1,     -- main crystal oscillator enable
+         MOSCRCEN => 1,     -- main on-chip rc osc. enable
+         MOSCXTST => 8,     -- startup time
+         others   => <>);
+      --  XXX shouldn't this give 4 MHz, not 12?
+   begin
+      PMC_Periph.CKGR_MOR := CKGR_MOR;
+   end;
 
    --  Loop until stable
    loop
-      exit when PMC_Periph.PMC_SR.MOSCXTS /= 0;
+      exit when PMC_Periph.PMC_SR.MOSCXTS = 1;
    end loop;
 
    --  Select the Main oscillator
    declare
-      CKGR_MOR : CKGR_MOR_Register;
+      CKGR_MOR : CKGR_MOR_Register := PMC_Periph.CKGR_MOR;
    begin
-      CKGR_MOR            := PMC_Periph.CKGR_MOR;
       CKGR_MOR.KEY        := 16#37#;
       CKGR_MOR.MOSCSEL    := 1;
       PMC_Periph.CKGR_MOR := CKGR_MOR;
@@ -73,18 +77,28 @@ begin
    end loop;
 
    --  Disable PLLA (?hardware bugfix?)
-   PMC_Periph.CKGR_PLLAR := (ONE    => 1,
-                             MULA   => 0,
-                             DIVA   => 0,
-                             others => <>);
+   declare
+      CKGR_PLLAR : constant CKGR_PLLAR_Register :=
+        (ONE    => 1,
+         MULA   => 0,
+         DIVA   => 0,
+         others => <>);
+   begin
+      PMC_Periph.CKGR_PLLAR := CKGR_PLLAR;
+   end;
 
    --  Set PLLA to multiply by 14, count 16#3f#, divide by 1 (=>
    --  enable PLL); Main Clock is 12 MHz, => 168 Mhz
-   PMC_Periph.CKGR_PLLAR := (ONE       => 1,
-                             MULA      => 13,   -- multipler - 1
-                             PLLACOUNT => 16#3f#,
-                             DIVA      => 1,
-                             others    => <>);
+   declare
+      CKGR_PLLAR : constant CKGR_PLLAR_Register :=
+        (ONE       => 1,
+         MULA      => 13,   -- multipler - 1
+         PLLACOUNT => 16#3f#,
+         DIVA      => 1,
+         others    => <>);
+   begin
+      PMC_Periph.CKGR_PLLAR := CKGR_PLLAR;
+   end;
 
    --  Loop until ready
    loop
@@ -95,16 +109,17 @@ begin
       PMC_MCKR : PMC_MCKR_Register;
    begin
       --  Select Main Clock, PRES 0 (no prescaling)
-      PMC_Periph.PMC_MCKR := (CSS    => Main_Clk,
-                              others => <>);
+      PMC_MCKR := (CSS    => MAIN_CLK,
+                   others => <>);
+      PMC_Periph.PMC_MCKR := PMC_MCKR;
       --  Loop until ready
       loop
          exit when PMC_Periph.PMC_SR.MCKRDY /= 0;
       end loop;
 
       --  Set PRES 8
       PMC_MCKR            := PMC_Periph.PMC_MCKR;
-      PMC_MCKR.PRES       := Clk_8;
+      PMC_MCKR.PRES       := CLK_8;
       PMC_Periph.PMC_MCKR := PMC_MCKR;
       --  Loop until ready
       loop
@@ -115,7 +130,7 @@ begin
       --  Main_Clock above, as recommended
       --  Set PRES
       PMC_MCKR            := PMC_Periph.PMC_MCKR;
-      PMC_MCKR.PRES       := Clk_2;
+      PMC_MCKR.PRES       := CLK_2;
       PMC_Periph.PMC_MCKR := PMC_MCKR;
       --  Loop until ready
       loop
@@ -124,7 +139,7 @@ begin
 
       --  Set CSS
       PMC_MCKR            := PMC_Periph.PMC_MCKR;
-      PMC_MCKR.CSS        := Plla_Clk;
+      PMC_MCKR.CSS        := PLLA_CLK;
       PMC_Periph.PMC_MCKR := PMC_MCKR;
       --  Loop until ready
       loop

arduino-due/adainclude/startup.adb

@@ -1,4 +1,4 @@
---  Copyright (C) 2016-2018 Free Software Foundation, Inc.
+--  Copyright (C) 2016-2021 Free Software Foundation, Inc.
 --
 --  This file is part of the Cortex GNAT RTS project. This file is
 --  free software; you can redistribute it and/or modify it under
@@ -18,7 +18,6 @@
 --  program; see the files COPYING3 and COPYING.RUNTIME respectively.
 --  If not, see <http://www.gnu.org/licenses/>.
 
-with Ada.Interrupts.Names;
 with Interfaces;
 with System.Machine_Code;
 with System.Parameters;
@@ -91,6 +90,8 @@ package body Startup is
       --  _edata:  the first address after read/write data in SRAM
       --  _sbss:   the start of BSS (to be initialized to zero)
       --  _ebss:   the first address after BSS.
+      --
+      --  _isr_vector is set up in interrupt_vectors.s.
 
       use System.Storage_Elements;
 
@@ -154,28 +155,19 @@ package body Startup is
       System.FreeRTOS.Tasks.Start_Scheduler;
    end Program_Initialization;
 
-   -------------------------
-   --  Interrupt vectors  --
-   -------------------------
+   --------------------------
+   --  Interrupt Handlers  --
+   --------------------------
 
-   --  Vector Table, 11057 23-Mar-15, Chapter 10.6.4
+   --  The interrupt vector is set up in interrupt_vectors.s, using
+   --  the handlers defined here.
 
-   procedure Dummy_Handler;
-   procedure Dummy_Handler is
-      IPSR : Interfaces.Unsigned_32
-        with Volatile; -- don't want it to be optimised away
-   begin
-      System.Machine_Code.Asm
-        ("mrs %0, ipsr",
-         Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR),
-         Volatile => True);
-      loop
-         null;
-      end loop;
-   end Dummy_Handler;
+   --  These handlers are all defined as Weak so that they can be
+   --  replaced by real handlers at link time.
 
-   --  The remaining handlers are all defined as Weak so that they can
-   --  be replaced by real handlers at link time.
+   --  If we defined the weak handlers in interrupt_vectors.s, the
+   --  references would be satisfied internally and so couldn't be
+   --  replaced by the real handler.
 
    procedure HardFault_Handler
    with Export, Convention => Ada, External_Name => "HardFault_Handler";
@@ -187,6 +179,7 @@ package body Startup is
       end loop;
    end HardFault_Handler;
 
+   --  Provided by FreeRTOS.
    procedure SVC_Handler
    with Export, Convention => Ada, External_Name => "SVC_Handler";
    pragma Weak_External (SVC_Handler);
@@ -197,6 +190,7 @@ package body Startup is
       end loop;
    end SVC_Handler;
 
+   --  Provided by FreeRTOS.
    procedure PendSV_Handler
    with Export, Convention => Ada, External_Name => "PendSV_Handler";
    pragma Weak_External (PendSV_Handler);
@@ -207,6 +201,7 @@ package body Startup is
       end loop;
    end PendSV_Handler;
 
+   --  Provided by FreeRTOS.
    procedure SysTick_Handler
    with Export, Convention => Ada, External_Name => "SysTick_Handler";
    pragma Weak_External (SysTick_Handler);
@@ -235,23 +230,4 @@ package body Startup is
       end loop;
    end IRQ_Handler;
 
-   type Handler is access procedure;
-
-   Vectors : array (-14 .. Ada.Interrupts.Names.CAN1_IRQ) of Handler :=
-     (-9 .. -6 | -4 .. -3 => null,                     -- reserved
-      -14                 => Dummy_Handler'Access,     -- NMI
-      -13                 => HardFault_Handler'Access, -- HardFault
-      -12                 => Dummy_Handler'Access,     -- MemManagement
-      -11                 => Dummy_Handler'Access,     -- BusFault
-      -10                 => Dummy_Handler'Access,     -- UsageFault
-      -5                  => SVC_Handler'Access,       -- SVCall
-      -2                  => PendSV_Handler'Access,    -- PendSV
-      -1                  => SysTick_Handler'Access,   -- SysTick
-      others              => IRQ_Handler'Access)
-     with
-       Export,
-       Convention         => Ada,
-       External_Name      => "isr_vector";
-   pragma Linker_Section (Vectors, ".isr_vector");
-
 end Startup;