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Add RVV inline header support. #522

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merged 1 commit into from
Mar 7, 2024
Merged

Add RVV inline header support. #522

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2 changes: 0 additions & 2 deletions .github/workflows/build_and_test.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -225,8 +225,6 @@ jobs:
EXTRA_CMAKE_FLAGS="${EXTRA_CMAKE_FLAGS} -DSLEEF_DISABLE_VXE2=ON"
elif [[ ${{ matrix.arch }} = "riscv64" ]]; then
EXTRA_CMAKE_FLAGS="${EXTRA_CMAKE_FLAGS} -DSLEEF_ENFORCE_RVVM1=ON -DSLEEF_ENFORCE_RVVM2=ON"
# Disable inline headers, they just don't compile on riscv64
EXTRA_CMAKE_FLAGS="${EXTRA_CMAKE_FLAGS} -DSLEEF_BUILD_INLINE_HEADERS=OFF"
fi

cmake -S . -B _build-${{ matrix.arch }} -GNinja \
Expand Down
30 changes: 30 additions & 0 deletions src/arch/helperrvv.h
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Expand Up @@ -55,14 +55,18 @@
#define LOG2VECTLENSP (LOG2VECTLENDP+1)

#define ENABLE_SP
//@#define ENABLE_SP
#define ENABLE_DP
//@#define ENABLE_DP

#if CONFIG != 2
#if defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2NOFMA)
#error "RVV NOFMA only supported for CONFIG=2"
#else
#define ENABLE_FMA_SP
//@#define ENABLE_FMA_SP
#define ENABLE_FMA_DP
//@#define ENABLE_FMA_DP
#endif
#endif

Expand Down Expand Up @@ -147,9 +151,13 @@ typedef vfloat64m1x4_t tdi_t;
#if SLEEF_RVV_VLEN == 0
#define VECTLENSP (__riscv_vsetvlmax_e32m1())
#define VECTLENDP SLEEF_RVV_DP_RUNTIME_VL()
//@#define VECTLENSP __riscv_vsetvlmax_e32m1()
//@#define VECTLENDP __riscv_vsetvlmax_e64m1()
#else
#define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float))
#define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double))
//@#define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float))
//@#define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double))
#endif
#define SLEEF_RVV_SP_VCAST_VF_F __riscv_vfmv_v_f_f32m1
#define SLEEF_RVV_SP_VCAST_VI2_I __riscv_vmv_v_x_i32m1
Expand Down Expand Up @@ -248,9 +256,13 @@ typedef vfloat64m2x4_t tdi_t;
#if SLEEF_RVV_VLEN == 0
#define VECTLENSP (__riscv_vsetvlmax_e32m2())
#define VECTLENDP SLEEF_RVV_DP_RUNTIME_VL()
//@#define VECTLENSP __riscv_vsetvlmax_e32m2()
//@#define VECTLENDP __riscv_vsetvlmax_e64m2()
#else
#define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float))
#define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double))
//@#define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float))
//@#define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double))
#endif
#define SLEEF_RVV_SP_VCAST_VF_F __riscv_vfmv_v_f_f32m2
#define SLEEF_RVV_SP_VCAST_VI2_I __riscv_vmv_v_x_i32m2
Expand Down Expand Up @@ -1319,6 +1331,15 @@ static INLINE void vprefetch_v_p(const void *ptr) {}
#define vxor_vo_vo_vo rvv_sp_vxor_vo_vo_vo
#endif // ENABLE_RVV_SP

//@#ifdef ENABLE_RVV_SP
//@#define vopmask rvv_sp_vopmask
//
//@#define vand_vo_vo_vo rvv_sp_vand_vo_vo_vo
//@#define vandnot_vo_vo_vo rvv_sp_vandnot_vo_vo_vo
//@#define vor_vo_vo_vo rvv_sp_vor_vo_vo_vo
//@#define vxor_vo_vo_vo rvv_sp_vxor_vo_vo_vo
//@#endif // ENABLE_RVV_SP

// Types and functions that conflict with ENABLE_RVV_SP
#ifdef ENABLE_RVV_DP
#define vopmask rvv_dp_vopmask
Expand All @@ -1329,4 +1350,13 @@ static INLINE void vprefetch_v_p(const void *ptr) {}
#define vxor_vo_vo_vo rvv_dp_vxor_vo_vo_vo
#endif // ENABLE_RVV_DP

//@#ifdef ENABLE_RVV_DP
//@#define vopmask rvv_dp_vopmask
//
//@#define vand_vo_vo_vo rvv_dp_vand_vo_vo_vo
//@#define vandnot_vo_vo_vo rvv_dp_vandnot_vo_vo_vo
//@#define vor_vo_vo_vo rvv_dp_vor_vo_vo_vo
//@#define vxor_vo_vo_vo rvv_dp_vxor_vo_vo_vo
//@#endif // ENABLE_RVV_DP

#endif // HELPERRVV_H
2 changes: 2 additions & 0 deletions src/common/keywords.txt
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Expand Up @@ -679,3 +679,5 @@ Sleef_rempitabdp
Sleef_rempitabqp
vcastu_vm_vi
vcastu_vi_vm
rvv_sp_vopmask
rvv_dp_vopmask
20 changes: 16 additions & 4 deletions src/libm-tester/iutsimd.c
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Expand Up @@ -57,6 +57,10 @@
#include <arm_sve.h>
#endif

#if defined(__riscv) && defined(__riscv_v)
#include <riscv_vector.h>
#endif

#if defined(__VSX__)
#include <altivec.h>
#endif
Expand Down Expand Up @@ -344,27 +348,35 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2;
#endif

#ifdef ENABLE_RVVM1
#include "renamervvm1.h"
#if !defined(USE_INLINE_HEADER)
#define CONFIG 1
#include "helperrvv.h"
#include "renamervvm1.h"
#endif
#endif

#ifdef ENABLE_RVVM1NOFMA
#include "renamervvm1nofma.h"
#if !defined(USE_INLINE_HEADER)
#define CONFIG 2
#include "helperrvv.h"
#include "renamervvm1nofma.h"
#endif
#endif

#ifdef ENABLE_RVVM2
#include "renamervvm2.h"
#if !defined(USE_INLINE_HEADER)
#define CONFIG 1
#include "helperrvv.h"
#include "renamervvm2.h"
#endif
#endif

#ifdef ENABLE_RVVM2NOFMA
#include "renamervvm2nofma.h"
#if !defined(USE_INLINE_HEADER)
#define CONFIG 2
#include "helperrvv.h"
#include "renamervvm2nofma.h"
#endif
#endif

#ifdef ENABLE_PUREC_SCALAR
Expand Down
16 changes: 0 additions & 16 deletions src/libm/sleefsimddp.c
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Expand Up @@ -224,51 +224,35 @@ extern const double Sleef_rempitabdp[];
// RISC-V
#ifdef ENABLE_RVVM1
#define CONFIG 1
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_DP
#include "helperrvv.h"
#else
#include "macroonlyRVVM1.h"
#endif
#ifdef DORENAME
#include "renamervvm1.h"
#endif
#endif

#ifdef ENABLE_RVVM1NOFMA
#define CONFIG 2
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_DP
#include "helperrvv.h"
#else
#include "macroonlyRVVM1NOFMA.h"
#endif
#ifdef DORENAME
#include "renamervvm1nofma.h"
#endif
#endif /* ENABLE_RVVM1NOFMA */

#ifdef ENABLE_RVVM2
#define CONFIG 1
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_DP
#include "helperrvv.h"
#else
#include "macroonlyRVVM2.h"
#endif
#ifdef DORENAME
#include "renamervvm2.h"
#endif
#endif

#ifdef ENABLE_RVVM2NOFMA
#define CONFIG 2
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_DP
#include "helperrvv.h"
#else
#include "macroonlyRVVM2NOFMA.h"
#endif
#ifdef DORENAME
#include "renamervvm2nofma.h"
#endif
Expand Down
8 changes: 4 additions & 4 deletions src/libm/sleefsimdsp.c
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Expand Up @@ -324,8 +324,8 @@ extern const float Sleef_rempitabsp[];
// RISC-V
#ifdef ENABLE_RVVM1
#define CONFIG 1
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_SP
#if !defined(SLEEF_GENHEADER)
#include "helperrvv.h"
#else
#include "macroonlyRVVM1.h"
Expand All @@ -337,8 +337,8 @@ extern const float Sleef_rempitabsp[];

#ifdef ENABLE_RVVM1NOFMA
#define CONFIG 2
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_SP
#if !defined(SLEEF_GENHEADER)
#include "helperrvv.h"
#else
#include "macroonlyRVVM1NOFMA.h"
Expand All @@ -350,8 +350,8 @@ extern const float Sleef_rempitabsp[];

#ifdef ENABLE_RVVM2
#define CONFIG 1
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_SP
#if !defined(SLEEF_GENHEADER)
#include "helperrvv.h"
#else
#include "macroonlyRVVM2.h"
Expand All @@ -363,8 +363,8 @@ extern const float Sleef_rempitabsp[];

#ifdef ENABLE_RVVM2NOFMA
#define CONFIG 2
#if !defined(SLEEF_GENHEADER)
#define ENABLE_RVV_SP
#if !defined(SLEEF_GENHEADER)
#include "helperrvv.h"
#else
#include "macroonlyRVVM2NOFMA.h"
Expand Down
4 changes: 4 additions & 0 deletions src/quad-tester/qiutsimd.c
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Expand Up @@ -60,6 +60,10 @@
#include <arm_sve.h>
#endif

#if defined(__riscv) && defined(__riscv_v)
#include <riscv_vector.h>
#endif

#if defined(__VSX__)
#include <altivec.h>
#endif
Expand Down
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