Split the stdsimd feature into separate features

crates/core_arch/README.md

@@ -7,8 +7,6 @@ The `core::arch` module implements architecture-dependent intrinsics (e.g. SIMD)
 
 `core::arch` is available as part of `libcore` and it is re-exported by
 `libstd`. Prefer using it via `core::arch` or `std::arch` than via this crate.
-Unstable features are often available in nightly Rust via the
-`feature(stdsimd)`.
 
 Using `core::arch` via this crate requires nightly Rust, and it can (and does)
 break often. The only cases in which you should consider using it via this crate

crates/core_arch/src/aarch64/crc.rs

@@ -15,6 +15,7 @@ use stdarch_test::assert_instr;
 #[inline]
 #[target_feature(enable = "crc")]
 #[cfg_attr(test, assert_instr(crc32x))]
+#[unstable(feature = "stdarch_arm_crc32", issue = "117215")]
 pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 {
     crc32x_(crc, data)
 }
@@ -25,6 +26,7 @@ pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 {
 #[inline]
 #[target_feature(enable = "crc")]
 #[cfg_attr(test, assert_instr(crc32cx))]
+#[unstable(feature = "stdarch_arm_crc32", issue = "117215")]
 pub unsafe fn __crc32cd(crc: u32, data: u64) -> u32 {
     crc32cx_(crc, data)
 }

crates/core_arch/src/aarch64/mod.rs

@@ -10,17 +10,22 @@
 #[cfg(target_endian = "little")]
 mod neon;
 #[cfg(target_endian = "little")]
+#[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub use self::neon::*;
 
 mod tme;
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub use self::tme::*;
 
 mod crc;
+#[unstable(feature = "stdarch_arm_crc32", issue = "117215")]
 pub use self::crc::*;
 
 mod prefetch;
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub use self::prefetch::*;
 
+#[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub use super::arm_shared::*;
 
 #[cfg(test)]

crates/core_arch/src/aarch64/neon/mod.rs

@@ -5,6 +5,7 @@
 #[rustfmt::skip]
 mod generated;
 #[rustfmt::skip]
+#[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub use self::generated::*;
 
 // FIXME: replace neon with asimd
@@ -3452,6 +3453,7 @@ pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x
 #[target_feature(enable = "neon,sm4")]
 #[cfg_attr(test, assert_instr(sm3tt1a, IMM2 = 0))]
 #[rustc_legacy_const_generics(3)]
+#[unstable(feature = "stdarch_neon_sm4", issue = "117226")]
 pub unsafe fn vsm3tt1aq_u32<const IMM2: i32>(
     a: uint32x4_t,
     b: uint32x4_t,
@@ -3471,6 +3473,7 @@ pub unsafe fn vsm3tt1aq_u32<const IMM2: i32>(
 #[target_feature(enable = "neon,sm4")]
 #[cfg_attr(test, assert_instr(sm3tt1b, IMM2 = 0))]
 #[rustc_legacy_const_generics(3)]
+#[unstable(feature = "stdarch_neon_sm4", issue = "117226")]
 pub unsafe fn vsm3tt1bq_u32<const IMM2: i32>(
     a: uint32x4_t,
     b: uint32x4_t,
@@ -3490,6 +3493,7 @@ pub unsafe fn vsm3tt1bq_u32<const IMM2: i32>(
 #[target_feature(enable = "neon,sm4")]
 #[cfg_attr(test, assert_instr(sm3tt2a, IMM2 = 0))]
 #[rustc_legacy_const_generics(3)]
+#[unstable(feature = "stdarch_neon_sm4", issue = "117226")]
 pub unsafe fn vsm3tt2aq_u32<const IMM2: i32>(
     a: uint32x4_t,
     b: uint32x4_t,
@@ -3509,6 +3513,7 @@ pub unsafe fn vsm3tt2aq_u32<const IMM2: i32>(
 #[target_feature(enable = "neon,sm4")]
 #[cfg_attr(test, assert_instr(sm3tt2b, IMM2 = 0))]
 #[rustc_legacy_const_generics(3)]
+#[unstable(feature = "stdarch_neon_sm4", issue = "117226")]
 pub unsafe fn vsm3tt2bq_u32<const IMM2: i32>(
     a: uint32x4_t,
     b: uint32x4_t,
@@ -3528,6 +3533,7 @@ pub unsafe fn vsm3tt2bq_u32<const IMM2: i32>(
 #[target_feature(enable = "neon,sha3")]
 #[cfg_attr(test, assert_instr(xar, IMM6 = 0))]
 #[rustc_legacy_const_generics(2)]
+#[unstable(feature = "stdarch_neon_sha3", issue = "117225")]
 pub unsafe fn vxarq_u64<const IMM6: i32>(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
     static_assert_uimm_bits!(IMM6, 6);
     #[allow(improper_ctypes)]

crates/core_arch/src/aarch64/prefetch.rs

@@ -7,21 +7,27 @@ extern "unadjusted" {
 }
 
 /// See [`prefetch`](fn._prefetch.html).
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub const _PREFETCH_READ: i32 = 0;
 
 /// See [`prefetch`](fn._prefetch.html).
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub const _PREFETCH_WRITE: i32 = 1;
 
 /// See [`prefetch`](fn._prefetch.html).
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub const _PREFETCH_LOCALITY0: i32 = 0;
 
 /// See [`prefetch`](fn._prefetch.html).
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub const _PREFETCH_LOCALITY1: i32 = 1;
 
 /// See [`prefetch`](fn._prefetch.html).
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub const _PREFETCH_LOCALITY2: i32 = 2;
 
 /// See [`prefetch`](fn._prefetch.html).
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 pub const _PREFETCH_LOCALITY3: i32 = 3;
 
 /// Fetch the cache line that contains address `p` using the given `RW` and `LOCALITY`.
@@ -64,6 +70,7 @@ pub const _PREFETCH_LOCALITY3: i32 = 3;
 #[cfg_attr(test, assert_instr("prfm pstl2keep", RW = _PREFETCH_WRITE, LOCALITY = _PREFETCH_LOCALITY2))]
 #[cfg_attr(test, assert_instr("prfm pstl1keep", RW = _PREFETCH_WRITE, LOCALITY = _PREFETCH_LOCALITY3))]
 #[rustc_legacy_const_generics(1, 2)]
+#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
 // FIXME: Replace this with the standard ACLE __pld/__pldx/__pli/__plix intrinsics
 pub unsafe fn _prefetch<const RW: i32, const LOCALITY: i32>(p: *const i8) {
     // We use the `llvm.prefetch` intrinsic with `cache type` = 1 (data cache).

crates/core_arch/src/aarch64/tme.rs

@@ -29,39 +29,51 @@ extern "unadjusted" {
 }
 
 /// Transaction successfully started.
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMSTART_SUCCESS: u64 = 0x00_u64;
 
 /// Extraction mask for failure reason
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_REASON: u64 = 0x00007FFF_u64;
 
 /// Transaction retry is possible.
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_RTRY: u64 = 1 << 15;
 
 /// Transaction executed a TCANCEL instruction
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_CNCL: u64 = 1 << 16;
 
 /// Transaction aborted because a conflict occurred
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_MEM: u64 = 1 << 17;
 
 /// Fallback error type for any other reason
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_IMP: u64 = 1 << 18;
 
 /// Transaction aborted because a non-permissible operation was attempted
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_ERR: u64 = 1 << 19;
 
 /// Transaction aborted due to read or write set limit was exceeded
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_SIZE: u64 = 1 << 20;
 
 /// Transaction aborted due to transactional nesting level was exceeded
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_NEST: u64 = 1 << 21;
 
 /// Transaction aborted due to a debug trap.
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_DBG: u64 = 1 << 22;
 
 /// Transaction failed from interrupt
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_INT: u64 = 1 << 23;
 
 /// Indicates a TRIVIAL version of TM is available
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub const _TMFAILURE_TRIVIAL: u64 = 1 << 24;
 
 /// Starts a new transaction. When the transaction starts successfully the return value is 0.
@@ -72,6 +84,7 @@ pub const _TMFAILURE_TRIVIAL: u64 = 1 << 24;
 #[inline]
 #[target_feature(enable = "tme")]
 #[cfg_attr(test, assert_instr(tstart))]
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub unsafe fn __tstart() -> u64 {
     aarch64_tstart()
 }
@@ -84,6 +97,7 @@ pub unsafe fn __tstart() -> u64 {
 #[inline]
 #[target_feature(enable = "tme")]
 #[cfg_attr(test, assert_instr(tcommit))]
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub unsafe fn __tcommit() {
     aarch64_tcommit()
 }
@@ -95,6 +109,7 @@ pub unsafe fn __tcommit() {
 #[target_feature(enable = "tme")]
 #[cfg_attr(test, assert_instr(tcancel, IMM16 = 0x0))]
 #[rustc_legacy_const_generics(0)]
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub unsafe fn __tcancel<const IMM16: u64>() {
     static_assert!(IMM16 <= 65535);
     aarch64_tcancel(IMM16);
@@ -107,6 +122,7 @@ pub unsafe fn __tcancel<const IMM16: u64>() {
 #[inline]
 #[target_feature(enable = "tme")]
 #[cfg_attr(test, assert_instr(ttest))]
+#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
 pub unsafe fn __ttest() -> u64 {
     aarch64_ttest()
 }

crates/core_arch/src/arm/dsp.rs

@@ -27,8 +27,10 @@ use crate::mem::transmute;
 
 types! {
     /// ARM-specific 32-bit wide vector of two packed `i16`.
+    #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
     pub struct int16x2_t(i16, i16);
     /// ARM-specific 32-bit wide vector of two packed `u16`.
+    #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
     pub struct uint16x2_t(u16, u16);
 }
 
@@ -82,6 +84,7 @@ extern "unadjusted" {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smulbb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulbb(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smulbb(transmute(a), transmute(b))
 }
@@ -92,6 +95,7 @@ pub unsafe fn __smulbb(a: int16x2_t, b: int16x2_t) -> i32 {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smultb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smultb(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smultb(transmute(a), transmute(b))
 }
@@ -102,6 +106,7 @@ pub unsafe fn __smultb(a: int16x2_t, b: int16x2_t) -> i32 {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smulbt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulbt(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smulbt(transmute(a), transmute(b))
 }
@@ -112,6 +117,7 @@ pub unsafe fn __smulbt(a: int16x2_t, b: int16x2_t) -> i32 {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smultt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smultt(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smultt(transmute(a), transmute(b))
 }
@@ -123,6 +129,7 @@ pub unsafe fn __smultt(a: int16x2_t, b: int16x2_t) -> i32 {
 /// Return the top 32 bits of the 48-bit product
 #[inline]
 #[cfg_attr(test, assert_instr(smulwb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulwb(a: int16x2_t, b: i32) -> i32 {
     arm_smulwb(transmute(a), b)
 }
@@ -134,6 +141,7 @@ pub unsafe fn __smulwb(a: int16x2_t, b: i32) -> i32 {
 /// Return the top 32 bits of the 48-bit product
 #[inline]
 #[cfg_attr(test, assert_instr(smulwt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulwt(a: int16x2_t, b: i32) -> i32 {
     arm_smulwt(transmute(a), b)
 }
@@ -144,6 +152,7 @@ pub unsafe fn __smulwt(a: int16x2_t, b: i32) -> i32 {
 /// Sets the Q flag if saturation occurs.
 #[inline]
 #[cfg_attr(test, assert_instr(qadd))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qadd(a: i32, b: i32) -> i32 {
     arm_qadd(a, b)
 }
@@ -154,6 +163,7 @@ pub unsafe fn __qadd(a: i32, b: i32) -> i32 {
 /// Sets the Q flag if saturation occurs.
 #[inline]
 #[cfg_attr(test, assert_instr(qsub))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qsub(a: i32, b: i32) -> i32 {
     arm_qsub(a, b)
 }
@@ -164,6 +174,7 @@ pub unsafe fn __qsub(a: i32, b: i32) -> i32 {
 /// Sets the Q flag if saturation occurs.
 #[inline]
 #[cfg_attr(test, assert_instr(qadd))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qdbl(a: i32) -> i32 {
     arm_qadd(a, a)
 }
@@ -175,6 +186,7 @@ pub unsafe fn __qdbl(a: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlabb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlabb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlabb(transmute(a), transmute(b), c)
 }
@@ -186,6 +198,7 @@ pub unsafe fn __smlabb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlabt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlabt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlabt(transmute(a), transmute(b), c)
 }
@@ -197,6 +210,7 @@ pub unsafe fn __smlabt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlatb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlatb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlatb(transmute(a), transmute(b), c)
 }
@@ -208,6 +222,7 @@ pub unsafe fn __smlatb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlatt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlatt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlatt(transmute(a), transmute(b), c)
 }
@@ -219,6 +234,7 @@ pub unsafe fn __smlatt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlawb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlawb(a: i32, b: int16x2_t, c: i32) -> i32 {
     arm_smlawb(a, transmute(b), c)
 }
@@ -230,6 +246,7 @@ pub unsafe fn __smlawb(a: i32, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlawt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlawt(a: i32, b: int16x2_t, c: i32) -> i32 {
     arm_smlawt(a, transmute(b), c)
 }