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core_arch: Fix ARMv6 CP15 barrier
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taiki-e authored and Amanieu committed Sep 29, 2023
1 parent 6d80869 commit ca1b140
Showing 1 changed file with 6 additions and 3 deletions.
9 changes: 6 additions & 3 deletions crates/core_arch/src/arm_shared/barrier/cp15.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,8 @@ impl super::super::sealed::Dmb for SY {
#[inline(always)]
unsafe fn __dmb(&self) {
asm!(
"mcr p15, 0, r0, c7, c10, 5",
"mcr p15, 0, {}, c7, c10, 5",
in(reg) 0_u32,
options(preserves_flags, nostack)
)
}
Expand All @@ -21,7 +22,8 @@ impl super::super::sealed::Dsb for SY {
#[inline(always)]
unsafe fn __dsb(&self) {
asm!(
"mcr p15, 0, r0, c7, c10, 4",
"mcr p15, 0, {}, c7, c10, 4",
in(reg) 0_u32,
options(preserves_flags, nostack)
)
}
Expand All @@ -31,7 +33,8 @@ impl super::super::sealed::Isb for SY {
#[inline(always)]
unsafe fn __isb(&self) {
asm!(
"mcr p15, 0, r0, c7, c5, 4",
"mcr p15, 0, {}, c7, c5, 4",
in(reg) 0_u32,
options(preserves_flags, nostack)
)
}
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