Add const csr hedelegh and masks for stateen.priv113/stateen.context

riscv-software-src · Jan 28, 2025 · 2db2820 · 2db2820
1 parent a8e9876
commit 2db2820
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Showing 3 changed files with 30 additions and 2 deletions.
diff --git a/riscv/csr_init.cc b/riscv/csr_init.cc
@@ -179,6 +179,8 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
     (1 << CAUSE_SOFTWARE_CHECK_FAULT) |
     (1 << CAUSE_HARDWARE_ERROR_FAULT);
   add_hypervisor_csr(CSR_HEDELEG, hedeleg = std::make_shared<masked_csr_t>(proc, CSR_HEDELEG, hedeleg_mask, 0));
+  constexpr unsigned CSR_HEDELEGH = 0x612;
+  add_hypervisor_csr(CSR_HEDELEGH, std::make_shared<hedelegh_csr_t>(proc, CSR_HEDELEGH, 0));
   add_hypervisor_csr(CSR_HCOUNTEREN, hcounteren = std::make_shared<masked_csr_t>(proc, CSR_HCOUNTEREN, counteren_mask, 0));
   htimedelta = std::make_shared<basic_csr_t>(proc, CSR_HTIMEDELTA, 0);
   if (xlen == 32) {
@@ -285,8 +287,11 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
                                  (proc->extension_enabled(EXT_ZCMT) ? SSTATEEN0_JVT : 0) |
                                  SSTATEEN0_CS;
     const reg_t hstateen0_mask = sstateen0_mask | HSTATEEN0_SENVCFG | HSTATEEN_SSTATEEN |
-                                (proc->extension_enabled(EXT_SSCSRIND) ? HSTATEEN0_CSRIND : 0);
-    const reg_t mstateen0_mask = hstateen0_mask | (proc->extension_enabled(EXT_SSQOSID) ?  MSTATEEN0_PRIV114 : 0);
+                                 (proc->extension_enabled(EXT_SSCSRIND) ? HSTATEEN0_CSRIND : 0) |
+                                 (proc->get_cfg().trigger_count > 0 ? HSTATEEN0_SCONTEXT : 0);
+    constexpr reg_t MSTATEEN0_PRIV113 = 0x0100000000000000;
+    const reg_t mstateen0_mask = hstateen0_mask | MSTATEEN0_PRIV113 |
+                                 (proc->extension_enabled(EXT_SSQOSID) ?  MSTATEEN0_PRIV114 : 0);
     for (int i = 0; i < 4; i++) {
       const reg_t mstateen_mask = i == 0 ? mstateen0_mask : MSTATEEN_HSTATEEN;
       mstateen[i] = std::make_shared<masked_csr_t>(proc, CSR_MSTATEEN0 + i, mstateen_mask, 0);

diff --git a/riscv/csrs.cc b/riscv/csrs.cc
@@ -1978,3 +1978,18 @@ void hcontext_csr_t::verify_permissions(insn_t insn, bool write) const {
   masked_csr_t::verify_permissions(insn, write);
 
 }
+
+hedelegh_csr_t::hedelegh_csr_t(processor_t* const proc, const reg_t addr, const reg_t init) :
+const_csr_t(proc, addr, init){};
+void hedelegh_csr_t::verify_permissions(insn_t insn, bool write) const {
+  if (proc->get_const_xlen() != 32)
+    throw trap_illegal_instruction(insn.bits());
+  if (proc->extension_enabled(EXT_SMSTATEEN)) {
+    if ((state->prv < PRV_M) &&
+        !(state->mstateen[0]->read() & MSTATEEN0_PRIV113))
+      throw trap_illegal_instruction(insn.bits());
+
+  }
+  const_csr_t::verify_permissions(insn, write);
+
+}
diff --git a/riscv/csrs.h b/riscv/csrs.h
@@ -924,4 +924,12 @@ class hcontext_csr_t: public masked_csr_t {
   hcontext_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask, const reg_t init);
   virtual void verify_permissions(insn_t insn, bool write) const override;
 };
+
+class hedelegh_csr_t: public const_csr_t {
+ public:
+  hedelegh_csr_t(processor_t* const proc, const reg_t addr, const reg_t init);
+  virtual void verify_permissions(insn_t insn, bool write) const override;
+private:
+  static constexpr reg_t MSTATEEN0_PRIV113 = 0x0100000000000000;
+};
 #endif