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Fix nullness check to src value in MOD32 and DIV32 #97

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merged 2 commits into from
Jan 5, 2024
Merged

Fix nullness check to src value in MOD32 and DIV32 #97

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92cf4e0
Fix nullness check to src value in MOD32 and DIV32
pcy190 Jan 3, 2024
a363028
tests/ubpf_vm.rs: Add non-regression tests for 32-bit divisions by 0
qmonnet Jan 4, 2024
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8 changes: 4 additions & 4 deletions src/interpreter.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -214,9 +214,9 @@ pub fn execute_program(prog_: Option<&[u8]>, mem: &[u8], mbuff: &[u8], helpers:
ebpf::SUB32_REG => reg[_dst] = (reg[_dst] as i32).wrapping_sub(reg[_src] as i32) as u64,
ebpf::MUL32_IMM => reg[_dst] = (reg[_dst] as i32).wrapping_mul(insn.imm) as u64,
ebpf::MUL32_REG => reg[_dst] = (reg[_dst] as i32).wrapping_mul(reg[_src] as i32) as u64,
ebpf::DIV32_IMM if insn.imm == 0 => reg[_dst] = 0,
ebpf::DIV32_IMM if insn.imm as u32 == 0 => reg[_dst] = 0,
ebpf::DIV32_IMM => reg[_dst] = (reg[_dst] as u32 / insn.imm as u32) as u64,
ebpf::DIV32_REG if reg[_src] == 0 => reg[_dst] = 0,
ebpf::DIV32_REG if reg[_src] as u32 == 0 => reg[_dst] = 0,
ebpf::DIV32_REG => reg[_dst] = (reg[_dst] as u32 / reg[_src] as u32) as u64,
ebpf::OR32_IMM => reg[_dst] = (reg[_dst] as u32 | insn.imm as u32) as u64,
ebpf::OR32_REG => reg[_dst] = (reg[_dst] as u32 | reg[_src] as u32) as u64,
Expand All @@ -227,9 +227,9 @@ pub fn execute_program(prog_: Option<&[u8]>, mem: &[u8], mbuff: &[u8], helpers:
ebpf::RSH32_IMM => reg[_dst] = (reg[_dst] as u32).wrapping_shr(insn.imm as u32) as u64,
ebpf::RSH32_REG => reg[_dst] = (reg[_dst] as u32).wrapping_shr(reg[_src] as u32) as u64,
ebpf::NEG32 => { reg[_dst] = (reg[_dst] as i32).wrapping_neg() as u64; reg[_dst] &= U32MAX; },
ebpf::MOD32_IMM if insn.imm == 0 => (),
ebpf::MOD32_IMM if insn.imm as u32 == 0 => (),
ebpf::MOD32_IMM => reg[_dst] = (reg[_dst] as u32 % insn.imm as u32) as u64,
ebpf::MOD32_REG if reg[_src] == 0 => (),
ebpf::MOD32_REG if reg[_src] as u32 == 0 => (),
ebpf::MOD32_REG => reg[_dst] = (reg[_dst] as u32 % reg[_src] as u32) as u64,
ebpf::XOR32_IMM => reg[_dst] = (reg[_dst] as u32 ^ insn.imm as u32) as u64,
ebpf::XOR32_REG => reg[_dst] = (reg[_dst] as u32 ^ reg[_src] as u32) as u64,
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22 changes: 22 additions & 0 deletions tests/ubpf_vm.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -440,6 +440,17 @@ fn test_vm_mod_by_zero_imm() {
assert_eq!(vm.execute_program().unwrap(), 0x1);
}

// Make sure we only consider the last 32 bits of the divisor.
#[test]
fn test_vm_mod_by_zero_reg_long() {
let prog = assemble("
lddw r1, 0x100000000
mod32 r0, r1
exit").unwrap();
let vm = rbpf::EbpfVmNoData::new(Some(&prog)).unwrap();
assert_eq!(vm.execute_program().unwrap(), 0x0);
}

#[test]
fn test_vm_div64_by_zero_reg() {
let prog = assemble("
Expand All @@ -462,6 +473,17 @@ fn test_vm_div_by_zero_reg() {
assert_eq!(vm.execute_program().unwrap(), 0x0);
}

// Make sure we only consider the last 32 bits of the divisor.
#[test]
fn test_vm_div_by_zero_reg_long() {
let prog = assemble("
lddw r1, 0x100000000
div32 r0, r1
exit").unwrap();
let vm = rbpf::EbpfVmNoData::new(Some(&prog)).unwrap();
assert_eq!(vm.execute_program().unwrap(), 0x0);
}

#[test]
fn test_vm_mod64_by_zero_reg() {
let prog = assemble("
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