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[hardware] Solve type conv warnings
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@mp-17
mp-17 committed Jan 10, 2025
1 parent 829d58d commit 07daab3
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Showing 3 changed files with 48 additions and 0 deletions.
5 changes: 5 additions & 0 deletions hardware/src/ara_dispatcher.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -362,10 +362,15 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
vtype : csr_vtype_q,
emul : csr_vtype_q.vlmul,
eew_vs1 : csr_vtype_q.vsew,
old_eew_vs1 : csr_vtype_q.vsew,
eew_vs2 : csr_vtype_q.vsew,
eew_vd_op : csr_vtype_q.vsew,
eew_vmask : eew_q[VMASK],
cvt_resize : CVT_SAME,
fp_rm : fpnew_pkg::RNE,
op : VADD,
conversion_vs1 : OpQueueConversionNone,
conversion_vs2 : OpQueueConversionNone,
default : '0
};
ara_req_valid = 1'b0;
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38 changes: 38 additions & 0 deletions hardware/src/lane/lane_sequencer.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -414,6 +414,8 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
cvt_resize : pe_req.cvt_resize,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vm | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
default: '0
};
// Since this request goes outside of the lane, we might need to request an
Expand Down Expand Up @@ -498,6 +500,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
cvt_resize : pe_req.cvt_resize,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vm | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default: '0
};
// Since this request goes outside of the lane, we might need to request an
Expand All @@ -517,6 +522,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
cvt_resize : pe_req.cvt_resize,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vm | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default: '0
};
// Since this request goes outside of the lane, we might need to request an
Expand All @@ -538,6 +546,7 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vstart : vfu_operation_d.vstart,
vtype : pe_req_i.vtype,
hazard : pe_req_i.hazard_vs2 | pe_req_i.hazard_vd,
cvt_resize: CVT_SAME,
default : '0
};
// Since this request goes outside of the lane, we might need to request an
Expand All @@ -560,6 +569,8 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vl : vfu_operation_d.vl,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs1 | pe_req.hazard_vd,
target_fu : ALU_SLDU,
cvt_resize: CVT_SAME,
default : '0
};
// Since this request goes outside of the lane, we might need to request an
Expand All @@ -580,6 +591,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
cvt_resize : pe_req.cvt_resize,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vm | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default: '0
};
// Since this request goes outside of the lane, we might need to request an
Expand All @@ -602,6 +616,7 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vstart : vfu_operation_d.vstart,
vtype : pe_req_i.vtype,
hazard : pe_req_i.hazard_vs2 | pe_req_i.hazard_vd,
cvt_resize: CVT_SAME,
default : '0
};
// Since this request goes outside of the lane, we might need to request an
Expand All @@ -624,6 +639,7 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs2 | pe_req.hazard_vd,
cvt_resize: CVT_SAME,
default : '0
};
operand_request_push[SlideAddrGenA] = pe_req.use_vs2;
Expand Down Expand Up @@ -684,6 +700,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vm | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default : '0
};
operand_request_push[MaskM] = !pe_req.vm;
Expand Down Expand Up @@ -726,6 +745,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs1 | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default : '0
};
// Since this request goes outside of the lane, we might need to request an
Expand Down Expand Up @@ -757,6 +779,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs2 | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default : '0
};
// Since this request goes outside of the lane, we might need to request an
Expand Down Expand Up @@ -789,6 +814,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs1 | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default : '0
};
// This is an operation that runs normally on the VMFPU, and then gets *condensed* and
Expand All @@ -811,6 +839,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs2 | pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default : '0
};
// This is an operation that runs normally on the VMFPU, and then gets *condensed* and
Expand All @@ -832,6 +863,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vd,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default : '0
};
// vl and eew depend on the real eew on which we are working on
Expand Down Expand Up @@ -867,6 +901,9 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vl : (pe_req.vl / NrLanes / ELEN),
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vm,
target_fu : ALU_SLDU,
conv : OpQueueConversionNone,
cvt_resize: CVT_SAME,
default: '0
};
// Request a balanced load from every lane despite it being active or not.
Expand All @@ -888,6 +925,7 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vl : vfu_operation_d.vl,
vstart : vfu_operation_d.vstart,
hazard : pe_req.hazard_vs2,
target_fu : ALU_SLDU,
default : '0
};
operand_request_push[MaskB] = 1'b1;
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5 changes: 5 additions & 0 deletions hardware/src/lane/operand_requester.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -506,34 +506,39 @@ module operand_requester import ara_pkg::*; import rvv_pkg::*; #(
wen : 1'b1,
wdata : alu_result_wdata_i,
be : alu_result_be_i,
opqueue: AluA,
default: '0
};
operand_payload[NrOperandQueues + VFU_MFpu] = '{
addr : mfpu_result_addr_i >> $clog2(NrBanks),
wen : 1'b1,
wdata : mfpu_result_wdata_i,
be : mfpu_result_be_i,
opqueue: AluA,
default: '0
};
operand_payload[NrOperandQueues + VFU_MaskUnit] = '{
addr : masku_result_addr >> $clog2(NrBanks),
wen : 1'b1,
wdata : masku_result_wdata,
be : masku_result_be,
opqueue: AluA,
default: '0
};
operand_payload[NrOperandQueues + VFU_SlideUnit] = '{
addr : sldu_result_addr >> $clog2(NrBanks),
wen : 1'b1,
wdata : sldu_result_wdata,
be : sldu_result_be,
opqueue: AluA,
default: '0
};
operand_payload[NrOperandQueues + VFU_LoadUnit] = '{
addr : ldu_result_addr >> $clog2(NrBanks),
wen : 1'b1,
wdata : ldu_result_wdata,
be : ldu_result_be,
opqueue: AluA,
default: '0
};

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