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target: msm8953: Enable sdcard fs support
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barni2000 authored and TravMurav committed Jun 30, 2024
1 parent 86446f7 commit 627e2f9
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Showing 2 changed files with 29 additions and 9 deletions.
1 change: 1 addition & 0 deletions platform/msm8953/include/platform/iomap.h
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,7 @@
#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)

#define SDC2_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x109000)
#define SDCC2_BCR (CLK_CTL_BASE + 0x43000) /* block reset */
#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x43018) /* branch control */
#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x4301C)
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37 changes: 28 additions & 9 deletions target/msm8953/init.c
Original file line number Diff line number Diff line change
Expand Up @@ -221,22 +221,24 @@ int get_target_boot_params(const char *cmdline, const char *part, char **buf)
}
#endif

static void set_sdc_power_ctrl(void)
static void set_sdc_power_ctrl(uint8_t slot)
{
uint32_t reg = (slot == 1 ? SDC1_HDRV_PULL_CTL : SDC2_HDRV_PULL_CTL);

/* Drive strength configs for sdc pins */
struct tlmm_cfgs sdc1_hdrv_cfg[] =
{
{ SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, 0},
{ SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, 0},
{ SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , 0},
{ SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, reg},
{ SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, reg},
{ SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , reg},
};

/* Pull configs for sdc pins */
struct tlmm_cfgs sdc1_pull_cfg[] =
{
{ SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, 0},
{ SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0},
{ SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0},
{ SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, reg},
{ SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, reg},
{ SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, reg},
};

struct tlmm_cfgs sdc1_rclk_cfg[] =
Expand All @@ -255,9 +257,9 @@ void target_sdc_init(void)
struct mmc_config_data config;

/* Set drive strength & pull ctrl values */
set_sdc_power_ctrl();
set_sdc_power_ctrl(1);

config.slot = MMC_SLOT;
config.slot = 1;
config.bus_width = DATA_BUS_WIDTH_8BIT;
config.max_clk_rate = MMC_CLK_192MHZ;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
Expand All @@ -280,6 +282,23 @@ void target_sdc_init(void)
}
}

struct mmc_device *target_get_sd_mmc(void)
{
struct mmc_config_data config;

set_sdc_power_ctrl(2);

config.slot = 2;
config.bus_width = DATA_BUS_WIDTH_4BIT;
config.max_clk_rate = MMC_CLK_177MHZ;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
config.hs400_support = 1;

return mmc_init(&config);
}

void *target_mmc_device(void)
{
return (void *) dev;
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