Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups #113751

Open
wants to merge 1 commit into
base: main
Choose a base branch
from

Conversation

arsenm
Copy link
Contributor

@arsenm arsenm commented Oct 26, 2024

0 does not make sense as a value for this to be, much less the default.
Also stop emitting each individual field if it is the default, rather than
if any element was the default. Also fix the name of the test since it didn't
exactly match the real attribute name.

…groups

0 does not make sense as a value for this to be, much less the default.
Also stop emitting each individual field if it is the default, rather than
if any element was the default. Also fix the name of the test since it didn't
exactly match the real attribute name.
@llvmbot
Copy link
Collaborator

llvmbot commented Oct 26, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

0 does not make sense as a value for this to be, much less the default.
Also stop emitting each individual field if it is the default, rather than
if any element was the default. Also fix the name of the test since it didn't
exactly match the real attribute name.


Full diff: https://github.com/llvm/llvm-project/pull/113751.diff

5 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp (+10-5)
  • (modified) llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (+2-1)
  • (modified) llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp (+4-3)
  • (modified) llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h (+2-1)
  • (renamed) llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll (+58)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
index bd418efcb83cb2..440d6f9a503279 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
@@ -504,14 +504,19 @@ MetadataStreamerMsgPackV4::getHSAKernelProps(const MachineFunction &MF,
 
   Kern[".max_flat_workgroup_size"] =
       Kern.getDocument()->getNode(MFI.getMaxFlatWorkGroupSize());
-  unsigned NumWGX = MFI.getMaxNumWorkGroupsX();
-  unsigned NumWGY = MFI.getMaxNumWorkGroupsY();
-  unsigned NumWGZ = MFI.getMaxNumWorkGroupsZ();
-  if (NumWGX != 0 && NumWGY != 0 && NumWGZ != 0) {
+
+  uint32_t NumWGX = MFI.getMaxNumWorkGroupsX();
+  uint32_t NumWGY = MFI.getMaxNumWorkGroupsY();
+  uint32_t NumWGZ = MFI.getMaxNumWorkGroupsZ();
+  if (NumWGX != std::numeric_limits<uint32_t>::max())
     Kern[".max_num_workgroups_x"] = Kern.getDocument()->getNode(NumWGX);
+
+  if (NumWGY != std::numeric_limits<uint32_t>::max())
     Kern[".max_num_workgroups_y"] = Kern.getDocument()->getNode(NumWGY);
+
+  if (NumWGZ != std::numeric_limits<uint32_t>::max())
     Kern[".max_num_workgroups_z"] = Kern.getDocument()->getNode(NumWGZ);
-  }
+
   Kern[".sgpr_spill_count"] =
       Kern.getDocument()->getNode(MFI.getNumSpilledSGPRs());
   Kern[".vgpr_spill_count"] =
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 961a9220b48d6b..54b17ca2cffb15 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -371,5 +371,6 @@ const AMDGPUSubtarget &AMDGPUSubtarget::get(const TargetMachine &TM, const Funct
 
 SmallVector<unsigned>
 AMDGPUSubtarget::getMaxNumWorkGroups(const Function &F) const {
-  return AMDGPU::getIntegerVecAttribute(F, "amdgpu-max-num-workgroups", 3);
+  return AMDGPU::getIntegerVecAttribute(F, "amdgpu-max-num-workgroups", 3,
+                                        std::numeric_limits<uint32_t>::max());
 }
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index 20a81a3135f0b2..c167e27ab07a51 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -1307,15 +1307,16 @@ getIntegerPairAttribute(const Function &F, StringRef Name,
 }
 
 SmallVector<unsigned> getIntegerVecAttribute(const Function &F, StringRef Name,
-                                             unsigned Size) {
+                                             unsigned Size,
+                                             unsigned DefaultVal) {
   assert(Size > 2);
-  SmallVector<unsigned> Default(Size, 0);
+  SmallVector<unsigned> Default(Size, DefaultVal);
 
   Attribute A = F.getFnAttribute(Name);
   if (!A.isStringAttribute())
     return Default;
 
-  SmallVector<unsigned> Vals(Size, 0);
+  SmallVector<unsigned> Vals(Size, DefaultVal);
 
   LLVMContext &Ctx = F.getContext();
 
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
index d1d84394cc0705..beebe320b2cf3a 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -919,7 +919,8 @@ getIntegerPairAttribute(const Function &F, StringRef Name,
 ///
 /// \returns false if any error occurs.
 SmallVector<unsigned> getIntegerVecAttribute(const Function &F, StringRef Name,
-                                             unsigned Size);
+                                             unsigned Size,
+                                             unsigned DefaultVal = 0);
 
 /// Represents the counter values to wait for in an s_waitcnt instruction.
 ///
diff --git a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
similarity index 58%
rename from llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
rename to llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
index bc58222076ac0e..f620b7077b5904 100644
--- a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups.ll
+++ b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
@@ -46,6 +46,33 @@ entry:
 attributes #4 = {"amdgpu-max-num-workgroups"="1024,1024,1024"}
 
 
+
+; Ignore if number of work groups for x dimension is 0.
+; CHECK-LABEL: {{^}}empty_max_num_workgroups_x_max:
+define amdgpu_kernel void @empty_max_num_workgroups_x_max() #5 {
+entry:
+  ret void
+}
+attributes #5 = {"amdgpu-max-num-workgroups"="4294967295,2,3"}
+
+; Ignore if number of work groups for y dimension is 0.
+; CHECK-LABEL: {{^}}empty_max_num_workgroups_y_max:
+define amdgpu_kernel void @empty_max_num_workgroups_y_max() #6 {
+entry:
+  ret void
+}
+attributes #6 = {"amdgpu-max-num-workgroups"="1,4294967295,3"}
+
+; Ignore if number of work groups for z dimension is 0.
+; CHECK-LABEL: {{^}}empty_max_num_workgroups_z_max:
+define amdgpu_kernel void @empty_max_num_workgroups_z_max() #7 {
+entry:
+  ret void
+}
+attributes #7 = {"amdgpu-max-num-workgroups"="1,2,4294967295"}
+
+
+
 ; CHECK: .amdgpu_metadata
 ; CHECK: - .args:
 ; CHECK:        .max_flat_workgroup_size: 1024
@@ -54,16 +81,25 @@ attributes #4 = {"amdgpu-max-num-workgroups"="1024,1024,1024"}
 
 ; CHECK: - .args:
 ; CHECK:        .max_flat_workgroup_size: 1024
+; CHECK-NEXT:   .max_num_workgroups_x: 0
+; CHECK-NEXT:   .max_num_workgroups_y: 2
+; CHECK-NEXT:   .max_num_workgroups_z: 3
 ; CHECK-NEXT:   .name:           empty_max_num_workgroups_x0
 ; CHECK-NEXT:   .private_segment_fixed_size: 0
 
 ; CHECK: - .args:
 ; CHECK:        .max_flat_workgroup_size: 1024
+; CHECK-NEXT:   .max_num_workgroups_x: 1
+; CHECK-NEXT:   .max_num_workgroups_y: 0
+; CHECK-NEXT:   .max_num_workgroups_z: 3
 ; CHECK-NEXT:   .name:           empty_max_num_workgroups_y0
 ; CHECK-NEXT:   .private_segment_fixed_size: 0
 
 ; CHECK: - .args:
 ; CHECK:        .max_flat_workgroup_size: 1024
+; CHECK-NEXT:   .max_num_workgroups_x: 1
+; CHECK-NEXT:   .max_num_workgroups_y: 2
+; CHECK-NEXT:   .max_num_workgroups_z: 0
 ; CHECK-NEXT:   .name:           empty_max_num_workgroups_z0
 ; CHECK-NEXT:   .private_segment_fixed_size: 0
 
@@ -82,3 +118,25 @@ attributes #4 = {"amdgpu-max-num-workgroups"="1024,1024,1024"}
 ; CHECK-NEXT:   .max_num_workgroups_z: 1024
 ; CHECK-NEXT:   .name:           empty_max_num_workgroups_1024_1024_1024
 ; CHECK-NEXT:   .private_segment_fixed_size: 0
+
+
+; CHECK: - .args:
+; CHECK:        .max_flat_workgroup_size: 1024
+; CHECK-NEXT:   .max_num_workgroups_y: 2
+; CHECK-NEXT:   .max_num_workgroups_z: 3
+; CHECK-NEXT:   .name:           empty_max_num_workgroups_x_max
+; CHECK-NEXT:   .private_segment_fixed_size: 0
+
+; CHECK: - .args:
+; CHECK:        .max_flat_workgroup_size: 1024
+; CHECK-NEXT:   .max_num_workgroups_x: 1
+; CHECK-NEXT:   .max_num_workgroups_z: 3
+; CHECK-NEXT:   .name:           empty_max_num_workgroups_y_max
+; CHECK-NEXT:   .private_segment_fixed_size: 0
+
+; CHECK: - .args:
+; CHECK:        .max_flat_workgroup_size: 1024
+; CHECK-NEXT:   .max_num_workgroups_x: 1
+; CHECK-NEXT:   .max_num_workgroups_y: 2
+; CHECK-NEXT:   .name:           empty_max_num_workgroups_z_max
+; CHECK-NEXT:   .private_segment_fixed_size: 0

@arsenm arsenm marked this pull request as ready for review October 26, 2024 04:15
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants