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modules: add APS6404L PSRAM
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this adds the APS6404L PSRAM.

Signed-off-by: Fin Maaß <[email protected]>
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maass-hamburg committed Sep 10, 2024
1 parent 85f4706 commit 444e777
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Showing 3 changed files with 33 additions and 0 deletions.
1 change: 1 addition & 0 deletions litespi/modules/__init__.py
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@@ -1,5 +1,6 @@
from litespi.modules.generated_modules import *
from litespi.modules.modules import *
from litespi.modules.ram_modules import *
from litespi.spi_nor_flash_module import MetaSizes

def print_modules():
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31 changes: 31 additions & 0 deletions litespi/modules/ram_modules.py
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from litespi.spi_nor_flash_module import SpiNorFlashModule
from litespi.opcodes import SpiNorFlashOpCodes as Codes
from litespi.ids import SpiNorFlashManufacturerIDs

# Define non-generated SPI PSRAM chips here

class APS6404L(SpiNorFlashModule):
manufacturer_id = SpiNorFlashManufacturerIDs.NONJEDEC # AP Memory
device_id = 0x0000
name = "aps6404l"

total_size = 8388608 # bytes
page_size = 128 # bytes
total_pages = 65536

supported_opcodes = [
Codes.READ_1_1_1, # max 33 MHz
Codes.READ_1_1_1_FAST, # max 84 MHz
Codes.READ_1_4_4, # max 84 MHz
Codes.READ_4_4_4_LOW, # max 66 MHz
Codes.READ_4_4_4, # max 84 MHz
Codes.PP_1_1_1, # max 84 MHz
Codes.PP_1_4_4, # max 84 MHz
]

dummy_cycles = {
Codes.READ_1_1_1_FAST: 8,
Codes.READ_1_4_4: 6,
Codes.READ_4_4_4_LOW: 4,
Codes.READ_4_4_4: 6,
}
1 change: 1 addition & 0 deletions litespi/opcodes.py
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Expand Up @@ -33,6 +33,7 @@ class SpiNorFlashOpCodes:
READ_1_2_2 = _Op(0xbb, "Read data bytes (Dual I/O SPI)")
READ_1_1_4 = _Op(0x6b, "Read data bytes (Quad Output SPI)")
READ_1_4_4 = _Op(0xeb, "Read data bytes (Quad I/O SPI)") # Fast Read Quad
READ_4_4_4_LOW = _Op(0x0b, "Read data bytes (Quad I/O QPI) (low frequency)") # might need less dummy cycles
READ_4_4_4 = _Op(0xeb, "Read data bytes (Quad I/O QPI)")
READ_1_1_8 = _Op(0x8b, "Read data bytes (Octal Output SPI)")
READ_1_8_8 = _Op(0xcb, "Read data bytes (Octal I/O SPI)")
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