app: boards: ace20_lnl: set DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT=y

Set CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT in board overlay as the Zephyr platform default is not correct in the current version of Zephyr. Link: thesofproject#9191 Signed-off-by: Kai Vehmanen <[email protected]>
kv2019i · Jun 4, 2024 · 8319b67 · 8319b67
1 parent 0bda13d
commit 8319b67
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/app/boards/intel_adsp_ace20_lnl.conf b/app/boards/intel_adsp_ace20_lnl.conf
@@ -77,6 +77,9 @@ CONFIG_PROBE_DMA_MAX=2
 
 CONFIG_MEMORY_WIN_2_SIZE=12288
 
+# must be set for LNL/ACE20
+# (can be removed once platform default changed in Zephyr upstream)
+CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT=y
 
 # Temporary disabled options
 CONFIG_TRACE=n