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add support at32 mcu #2933

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Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,8 @@
// TODO fix later
#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
extern u32 SystemCoreClock;
#elif (defined TUP_USBIP_FSDEV_AT32)||(defined TUP_USBIP_DWC2_AT32)
extern unsigned int SystemCoreClock;
#else
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,8 @@
// TODO fix later
#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
extern u32 SystemCoreClock;
#elif (defined TUP_USBIP_FSDEV_AT32)||(defined TUP_USBIP_DWC2_AT32)
extern unsigned int SystemCoreClock;
#else
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,8 @@
// TODO fix later
#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
extern u32 SystemCoreClock;
#elif (defined TUP_USBIP_FSDEV_AT32)||(defined TUP_USBIP_DWC2_AT32)
extern unsigned int SystemCoreClock;
#else
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,8 @@
// TODO fix later
#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
extern u32 SystemCoreClock;
#elif (defined TUP_USBIP_FSDEV_AT32)||(defined TUP_USBIP_DWC2_AT32)
extern unsigned int SystemCoreClock;
#else
// FIXME cause redundant-decls warnings
extern uint32_t SystemCoreClock;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,8 @@
// FIXME cause redundant-decls warnings
#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
extern u32 SystemCoreClock;
#elif (defined TUP_USBIP_FSDEV_AT32)||(defined TUP_USBIP_DWC2_AT32)
extern unsigned int SystemCoreClock;
#else
extern uint32_t SystemCoreClock;
#endif
Expand Down
127 changes: 127 additions & 0 deletions hw/bsp/at32f402_405/at32f402_405_clock.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,127 @@
/**
**************************************************************************
* @file at32f402_405_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/

/* includes ------------------------------------------------------------------*/
#include "at32f402_405_clock.h"

/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = (hext * pll_ns)/(pll_ms * pll_fp)
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 216000000
* - ahbdiv = 1
* - ahbclk = 216000000
* - apb2div = 1
* - apb2clk = 216000000
* - apb1div = 2
* - apb1clk = 108000000
* - pll_ns = 72
* - pll_ms = 1
* - pll_fr = 4
* - flash_wtcyc = 6 cycle
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
crm_reset();

/* config flash psr register */
flash_psr_set(FLASH_WAIT_CYCLE_6);

/* enable pwc periph clock */
crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);

/* set power ldo output voltage to 1.3v */
pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);

crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);

/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}

/* if pll parameter has changed, please use the AT32_New_Clock_Configuration tool for new configuration. */
crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FP_4);

/* config pllu div */
crm_pllu_div_set(CRM_PLL_FU_18);

/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);

/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}

/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);

/* config apb2clk, the maximum frequency of APB2 clock is 216 MHz */
crm_apb2_div_set(CRM_APB2_DIV_1);

/* config apb1clk, the maximum frequency of APB1 clock is 120 MHz */
crm_apb1_div_set(CRM_APB1_DIV_2);

/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);

/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);

/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}

/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);

/* update system_core_clock global variable */
system_core_clock_update();

#ifdef AT32F405xx
/*
AT32405 OTGHS PHY not initialized, resulting in high power consumption
Solutions:
1. If OTGHS is not used, call the "reduce_power_consumption" function to reduce power consumption.
PLL or HEXT should be enabled when calling this function.
Example: reduce_power_consumption();

2. If OTGHS is required, initialize OTGHS to reduce power consumption, without the need to call this function.

for more detailed information. please refer to the faq document FAQ0148.
*/
#endif

#ifdef AT32F402xx
/* reduce power comsumption */
reduce_power_consumption();
#endif
}
44 changes: 44 additions & 0 deletions hw/bsp/at32f402_405/at32f402_405_clock.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
/**
**************************************************************************
* @file at32f402_405_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/

/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F402_405_CLOCK_H
#define __AT32F402_405_CLOCK_H

#ifdef __cplusplus
extern "C" {
#endif

/* includes ------------------------------------------------------------------*/
#include "at32f402_405.h"

/* exported functions ------------------------------------------------------- */
void system_clock_config(void);

#ifdef __cplusplus
}
#endif

#endif

151 changes: 151 additions & 0 deletions hw/bsp/at32f402_405/at32f402_405_conf.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,151 @@
/**
**************************************************************************
* @file at32f402_405_conf.h
* @brief at32f402_405 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/

/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F402_405_CONF_H
#define __AT32F402_405_CONF_H

#ifdef __cplusplus
extern "C" {
#endif

/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)12000000) /*!< value of the high speed external crystal in hz */
#endif

/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */

#define SystemCoreClock system_core_clock

/* module define -------------------------------------------------------------*/
#define ACC_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define CAN_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define CRM_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define ERTC_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define QSPI_MODULE_ENABLED
#define SCFG_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define USB_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define WWDT_MODULE_ENABLED

/* includes ------------------------------------------------------------------*/
#ifdef ACC_MODULE_ENABLED
#include "at32f402_405_acc.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f402_405_adc.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f402_405_can.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f402_405_crc.h"
#endif
#ifdef CRM_MODULE_ENABLED
#include "at32f402_405_crm.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f402_405_debug.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f402_405_dma.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32f402_405_ertc.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f402_405_exint.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f402_405_flash.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f402_405_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f402_405_i2c.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f402_405_misc.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f402_405_pwc.h"
#endif
#ifdef QSPI_MODULE_ENABLED
#include "at32f402_405_qspi.h"
#endif
#ifdef SCFG_MODULE_ENABLED
#include "at32f402_405_scfg.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f402_405_spi.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f402_405_tmr.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f402_405_usart.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f402_405_usb.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f402_405_wdt.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f402_405_wwdt.h"
#endif

#ifdef __cplusplus
}
#endif

#endif
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