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@jchlanda jchlanda commented Aug 6, 2016 •
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This PR brings llvm-leg to release_39 of llvm (https://github.com/llvm-mirror/llvm/tree/release_39/).

nico and others added 30 commits July 14, 2016 13:54
@nico
Teach fast isel calls and rets about stdcall.
cccdd2e 
stdcall is callee-pop like thiscall, so the thiscall changes already did most
of the work for this.  This change only opts stdcall in and adds tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275414 91177308-0d34-0410-b5e6-96231b3b80d8
@mssimpso
[LV] Avoid unnecessary IV scalar-to-vector-to-scalar conversions
bc38653 
This patch prevents increases in the number of instructions, pre-instcombine,
due to induction variable scalarization. An increase in instructions can lead
to an increase in the compile-time required to simplify the induction
variables. We now maintain a new map for scalarized induction variables to
prevent us from converting between the scalar and vector forms.

This patch should resolve compile-time regressions seen after r274627.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275419 91177308-0d34-0410-b5e6-96231b3b80d8
@nico
Revert r275401, it caused PR28551.
037f8a7 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275420 91177308-0d34-0410-b5e6-96231b3b80d8
@nico
Revert r275411, it cause PR28552.
e76c5af 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275421 91177308-0d34-0410-b5e6-96231b3b80d8
@SamWot
[AMDGPU] Assembler: fix row_bcast parsing
1c81036 
Summary: This change fix bug 28538

Reviewers: tstellarAMD, vpykhtin

Subscribers: arsenm, kzhuravl

Differential Revision: https://reviews.llvm.org/D22355

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275422 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[GlobalISel] Fix #include ordering/spacing. NFC.
8b85118 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275423 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[TableGen] Cleanup Record comments. NFC.
cf03606 
LLVM doesn't use exceptions anymore.
Also remove the implementation comments. Some of them diverged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275424 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[TableGen] Autobrief-ize Record. NFC.
27cc0cc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275425 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[X86] Don't mark addressing mode operands as "outs". NFC-ish.
1ac61e2 
Nothing in-tree can tell the difference, but it's incorrect: the
addressing mode registers aren't what's defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275426 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[X86] Decode MPX BND registers.
6a16f1b 
We were able to assemble, but not disassemble.

Note that fixupRMValue was truncating EA_REG_BND0-3 because we hit
the uint8_t max.  The control registers were already squarely above
it, but I don't think they ever go in .r/m, only in .reg.

I also did notice an extra REX.W in our encoding, but I think that's
fine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275427 91177308-0d34-0410-b5e6-96231b3b80d8
@nico
Delete some trailing whitespace.
b19f420 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275429 91177308-0d34-0410-b5e6-96231b3b80d8
@nico
Don't optimize movs to pushes in -O0 builds.
3d6b13f 
https://reviews.llvm.org/D22362


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275431 91177308-0d34-0410-b5e6-96231b3b80d8
@tstellarAMD
GlobalsAA: Functions with the argmemonly attribute won't read arbitra…
6e4b75d 
…ry globals

Summary:
In preparation for changing GlobalsAA to stop assuming that intrinsics
can't read arbitrary globals, we need to make sure GlobalsAA is querying
function attributes rather than relying on this assumption.

This patch was inspired by: http://reviews.llvm.org/D20206

Reviewers: jmolloy, hfinkel

Subscribers: eli.friedman, llvm-commits

Differential Revision: https://reviews.llvm.org/D21318

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275433 91177308-0d34-0410-b5e6-96231b3b80d8
@TNorthover
ARM: fix vmov.i64 immediate validity check
5591e3d 
Typo meant we were only checking the low byte (repeatedly).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275437 91177308-0d34-0410-b5e6-96231b3b80d8
[CodeGen] Refactor MachineMemOperand's Flags enum.
f66cee6 
Summary:
- Give it a shorter name (because we're going to refer to it often from
  SelectionDAG and friends).

- Split the flags and alignment into separate variables.

- Specialize FlagsEnumTraits for it, so we can do bitwise ops on it
  without losing type information.

- Make some enum values constants in MachineMemOperand instead.
  MOMaxBits should not be a valid Flag.

- Simplify some of the bitwise ops for dealing with Flags.

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D22281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275438 91177308-0d34-0410-b5e6-96231b3b80d8
@rotateright
auto-generate checks
e53b5c2 
Note: I removed the checks after each jump because that's noise, but we apparently 
need branches rather than returning i1 to see the bt codegen in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275439 91177308-0d34-0410-b5e6-96231b3b80d8
[CodeGen] s/constexpr/LLVM_CONSTEXPR/ in MachineMemOperand.h.
3eef398 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275441 91177308-0d34-0410-b5e6-96231b3b80d8
@compnerd
X86: handle external tail calls in Windows JIT
4d45f1e 
If there was a tail call, we would incorrectly handle the relocation.  It would
end up indexing into the array with an incorrect section id.  The symbol was
external to the module, so the Section ID was UNDEFINED (-1).  We would then
index the SmallVector with this ID, triggering an assertion.  Use the Value
rather than the section load address in this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275442 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[CodeGen] Simplify reg bank/class union is+get into dyn_cast. NFC.
3ce0513 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275443 91177308-0d34-0410-b5e6-96231b3b80d8
@ahmedbougacha
[GlobalISel] Fix G_OR opcode after the addition of a TargetOpcode.
e9edae4 
r275367 fixed G_ADD and G_BR, but not G_OR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275444 91177308-0d34-0410-b5e6-96231b3b80d8
@niravhdave
[X86][MC] Fix bracket expression parsing in intel-style assembly.
99b3da6 
Only perform struct field check on Identifier tokens.

Fixes PR28547.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22361

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275445 91177308-0d34-0410-b5e6-96231b3b80d8
@kcc
[sanitizer-coverage] make sure that calls to __sanitizer_cov_trace_pc…
ec8a2f2 
… are not merged (otherwise different calls get the same PC and confuse fuzzers)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275449 91177308-0d34-0410-b5e6-96231b3b80d8
@bogner
TableGen: Fix a confusing use of both i and I as variables. NFC
505d1e7 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275450 91177308-0d34-0410-b5e6-96231b3b80d8
[CodeGen] Refactor MachineMemOperand::Flags's target-specific flags.
d4faf8f 
Summary:
Make the target-specific flags in MachineMemOperand::Flags real, bona
fide enum values.  This simplifies users, prevents various constants
from going out of sync, and avoids the false sense of security provided
by declaring static members in classes and then forgetting to define
them inside of cpp files.

Reviewers: MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275451 91177308-0d34-0410-b5e6-96231b3b80d8
[PM] Port Dead Loop Deletion Pass to the new PM
fa907d3 
Summary: Port Dead Loop Deletion Pass to the new pass manager.

Reviewers: silvas, davide

Subscribers: llvm-commits, sanjoy, mcrosier

Differential Revision: https://reviews.llvm.org/D21483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275453 91177308-0d34-0410-b5e6-96231b3b80d8
Add debugging code to the packetizer
8bd1db4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275455 91177308-0d34-0410-b5e6-96231b3b80d8
@sanjoy
[JumpThreading] PRE unordered loads
c87d751 
Summary: Extend JumpThreading's PRE to unordered atomic loads.

Reviewers: hfinkel, reames

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D22326

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275456 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Adjust the scheduling model for Exynos-M1.
7846f45 
Enable use-postra-scheduler. (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275457 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Packetize function call arguments with tail call instructions
1a360b3 
On Hexagon is it legal to packetize the instructions setting up call
arguments with the call instruction itself. This was already done,
except for tail calls. Make sure tail calls are handled as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275458 91177308-0d34-0410-b5e6-96231b3b80d8
s/constexpr/LLVM_CONSTEXPR in AArch64InstrInfo.cpp.
d1a73a0 
Yet again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275463 91177308-0d34-0410-b5e6-96231b3b80d8
zmodem and others added 24 commits July 25, 2016 17:27
@zmodem
Merging r276389:
2adc29e 
------------------------------------------------------------------------
r276389 | majnemer | 2016-07-21 21:54:44 -0700 (Thu, 21 Jul 2016) | 6 lines

Don't remove side effecting instructions due to ConstantFoldInstruction

Just because we can constant fold the result of an instruction does not
imply that we can delete the instruction.  It may have side effects.

This fixes PR28655.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276660 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276236 and r276237:
065c539 
------------------------------------------------------------------------
r276236 | deadalnix | 2016-07-20 21:25:06 -0700 (Wed, 20 Jul 2016) | 9 lines

Expose AttributeSetNode, use it to provide aggregate getter for attribute in the C API.

Summary: See D19181 for context.

Reviewers: whitequark, Wallbraker, jyknight, echristo, bkramer, void

Subscribers: mehdi_amini

Differential Revision: http://reviews.llvm.org/D21265
------------------------------------------------------------------------

------------------------------------------------------------------------
r276237 | deadalnix | 2016-07-20 21:31:38 -0700 (Wed, 20 Jul 2016) | 1 line

Add missing import to fix the build
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276663 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r275928 and r276438:
8830176 
------------------------------------------------------------------------
r275928 | arsenm | 2016-07-18 16:09:51 -0700 (Mon, 18 Jul 2016) | 1 line

AMDGPU: Fix test name and broken CHECK-LABEL
------------------------------------------------------------------------

------------------------------------------------------------------------
r276438 | arsenm | 2016-07-22 10:01:33 -0700 (Fri, 22 Jul 2016) | 6 lines

AMDGPU: Fix groupstaticsize for large LDS

The size can exceed s_movk_i32's limit, and we don't
want to use it this early since it inhibits optimizations.

This should probably be merged to the release branch.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276664 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276077:
fc9c4d6 
------------------------------------------------------------------------
r276077 | mzolotukhin | 2016-07-19 18:55:27 -0700 (Tue, 19 Jul 2016) | 4 lines

Revert "Revert r275883 and r275891. They seem to cause PR28608."

This reverts commit r276064, and thus reapplies r275891 and r275883 with
a fix for PR28608.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276665 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276510:
e5a9de1 
------------------------------------------------------------------------
r276510 | majnemer | 2016-07-22 19:56:49 -0700 (Fri, 22 Jul 2016) | 9 lines

[LoopUnrollAnalyzer] Handle out of bounds accesses in visitLoad

While we handed loads past the end of an array, we didn't handle loads
_before_ the array.

This fixes PR28062.

N.B. While the bug in the code is obvious, I am struggling to craft a
test case which is reasonable in size.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276688 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276109:
ae2034a 
------------------------------------------------------------------------
r276109 | rengolin | 2016-07-20 05:16:38 -0700 (Wed, 20 Jul 2016) | 20 lines

[docs] Fixing Sphinx warnings to unclog the buildbot

Lots of blocks had "llvm" or "nasm" syntax types but either weren't following
the syntax, or the syntax has changed (and sphinx hasn't keep up) or the type
doesn't even exist (nasm?).

Other documents had :options: what were invalid. I only removed those that had
warnings, and left the ones that didn't, in order to follow the principle of
least surprise.

This is like this for ages, but the buildbot is now failing on errors. It may
take a while to upgrade the buildbot's sphinx, if that's even possible, but
that shouldn't stop us from getting docs updates (which seem down for quite
a while).

Also, we're not losing any syntax highlight, since when it doesn't parse, it
doesn't colour. Ie. those blocks are not being highlighted anyway.

I'm trying to get all docs in one go, so that it's easy to revert later if we
do fix, or at least easy to know what's to fix.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276758 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276015:
63485bd 
------------------------------------------------------------------------
r276015 | vedantk | 2016-07-19 13:16:08 -0700 (Tue, 19 Jul 2016) | 7 lines

[tsan] Don't instrument __llvm_gcov_global_state_pred or __llvm_gcda*

r274801 did not go far enough to allow gcov+tsan to cooperate. With this
commit it's possible to run the following code without false positives:

  std::thread T1(fib), T2(fib);
  T1.join(); T2.join();
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276810 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r275978:
9713100 
------------------------------------------------------------------------
r275978 | pgode | 2016-07-19 07:30:21 -0700 (Tue, 19 Jul 2016) | 7 lines

[AArch64] PredictableSelectIsExpensive for Vulcan.

Adding PredictableSelectIsExpensive for Vulcan

Differential Revision: https://reviews.llvm.org/D22448


------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276880 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
docs: Remove 'if you are using a released version' warning
2605c1b 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276893 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Back-port r276209:
cd00acd 
------------------------------------------------------------------------
r276209 | spatel | 2016-07-20 16:40:01 -0700 (Wed, 20 Jul 2016) | 4 lines

[InstSimplify][InstCombine] don't crash when folding vector selects of icmp

Differential Revision: https://reviews.llvm.org/D22602

------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276986 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r275981 and r276740:
7230d55 
------------------------------------------------------------------------
r275981 | rksimon | 2016-07-19 08:07:43 -0700 (Tue, 19 Jul 2016) | 13 lines

[X86][SSE] Reimplement SSE fp2si conversion intrinsics instead of using generic IR

D20859 and D20860 attempted to replace the SSE (V)CVTTPS2DQ and VCVTTPD2DQ truncating conversions with generic IR instead.

It turns out that the behaviour of these intrinsics is different enough from generic IR that this will cause problems, INF/NAN/out of range values are guaranteed to result in a 0x80000000 value - which plays havoc with constant folding which converts them to either zero or UNDEF. This is also an issue with the scalar implementations (which were already generic IR and what I was trying to match).

This patch changes both scalar and packed versions back to using x86-specific builtins.

It also deals with the other scalar conversion cases that are runtime rounding mode dependent and can have similar issues with constant folding.

A companion clang patch is at D22105

Differential Revision: https://reviews.llvm.org/D22106
------------------------------------------------------------------------

------------------------------------------------------------------------
r276740 | rksimon | 2016-07-26 03:41:28 -0700 (Tue, 26 Jul 2016) | 5 lines

[X86][SSE] Fixed issue with memory folding of (v)cvtsd2ss intrinsics

Fixed typo in the intrinsic definitions of (v)cvtsd2ss with memory folding.

This was only unearthed when rL276102 started using the intrinsic again.....
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@276990 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r275868:
7e5531e 
------------------------------------------------------------------------
r275868 | arsenm | 2016-07-18 11:34:48 -0700 (Mon, 18 Jul 2016) | 4 lines

AMDGPU: Remove dead code and redundant check

Non intrinsic calls aren't really handled, and this
IntrinsicInst dyn_cast checks for the function for us.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277076 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r275869:
7653e62 
------------------------------------------------------------------------
r275869 | arsenm | 2016-07-18 11:34:53 -0700 (Mon, 18 Jul 2016) | 7 lines

AMDGPU: Remove dead check in AMDGPUPromoteAlloca

This is currently only called with GEP users. A direct
alloca would only happen with current typed pointers
for arrays which are a perverse case.

Also fix crashes on 0 x and 1 x arrays.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277077 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276956:
83c76e2 
------------------------------------------------------------------------
r276956 | majnemer | 2016-07-27 22:03:22 -0700 (Wed, 27 Jul 2016) | 6 lines

[CodeView] Don't crash on functions without subprograms

A function may have instructions annotated with debug info without
having a subprogram.

This fixes PR28747.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277078 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276119:
4444fc4 
------------------------------------------------------------------------
r276119 | yaxunl | 2016-07-20 07:38:06 -0700 (Wed, 20 Jul 2016) | 3 lines

AMDGPU: Fix bug causing crash due to invalid opencl version metadata.

Differential Revision: https://reviews.llvm.org/D22526
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277079 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276435:
86c801f 
------------------------------------------------------------------------
r276435 | arsenm | 2016-07-22 10:01:21 -0700 (Fri, 22 Jul 2016) | 4 lines

AMDGPU: Fix i1 fp_to_int

R600's i1 fp_to_uint selected but was incorrect according to
what instcombine constant folds to.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277082 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276980:
53abc28 
------------------------------------------------------------------------
r276980 | tstellar | 2016-07-28 07:30:43 -0700 (Thu, 28 Jul 2016) | 12 lines

AMDGPU/SI: Don't use reserved VGPRs for SGPR spilling

Summary:
We were using reserved VGPRs for SGPR spilling and this was causing
some programs with a workgroup size of 1024 to use more than 64
registers, which is illegal.

Reviewers: arsenm, mareko, nhaehnle

Subscribers: nhaehnle, arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D22032
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277084 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r277135:
4105790 
------------------------------------------------------------------------
r277135 | niravd | 2016-07-29 04:49:32 -0700 (Fri, 29 Jul 2016) | 12 lines

Cleanup TransferDbgValues

[DAG] Check debug values for invalidation before transferring and mark
old debug values invalid when transferring to another SDValue.

This fixes PR28613.

Reviewers: jyknight, hans, dblaikie, echristo

Subscribers: yaron.keren, ismail, llvm-commits

Differential Revision: https://reviews.llvm.org/D22858
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277164 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r277114:
4976a3a 
------------------------------------------------------------------------
r277114 | majnemer | 2016-07-28 22:39:21 -0700 (Thu, 28 Jul 2016) | 6 lines

[EarlyCSE] Correctly handle simplified, but live, instructions

Some instructions may have their uses replaced with a symbolic constant.
However, the instruction may still have side effects which percludes it
from being removed from the function.  EarlyCSE treated such an
instruction as if it were removed, resulting in PR28763.
------------------------------------------------------------------------


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@rengolin
Merging r276701 and r277439
358d8cc 
The saturation instructions appeared in v6T2 / DSP extensions, but they
were being accepted / generated on any, with the new introduction of the
saturation detection in the back-end. This commit restricts the usage to
v6T2 / DSP-enable only cores.

Fixes PR28607.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277440 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r276648:
b55453a 
------------------------------------------------------------------------
r276648 | delena | 2016-07-25 09:51:00 -0700 (Mon, 25 Jul 2016) | 6 lines

AVX-512: Fixed [US]INT_TO_FP selection for i1 vectors.
It failed with assertion before this patch.

Differential Revision: https://reviews.llvm.org/D22735


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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277508 91177308-0d34-0410-b5e6-96231b3b80d8
@zmodem
Merging r277371:
f89a462 
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r277371 | mkuper | 2016-08-01 12:39:49 -0700 (Mon, 01 Aug 2016) | 9 lines

[DAGCombine] Make sext(setcc) combine respect getBooleanContents

We used to combine "sext(setcc x, y, cc) -> (select (setcc x, y, cc), -1, 0)"
Instead, we should combine to (select (setcc x, y, cc), T, 0) where the value
of T is 1 or -1, depending on the type of the setcc, and getBooleanContents()
for the type if it is not i1.

This fixes PR28504.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277509 91177308-0d34-0410-b5e6-96231b3b80d8
@jchlanda
Merge remote-tracking branch 'llvm-mirror/release_38' into 38_merge
9636900
@jchlanda
Merge remote-tracking branch 'llvm-mirror/release_39' into 39_merge
c411d24
@frasercrmck
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@pasaulais Want to help take a look?

@pasaulais
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In LEGInstrInfo::expandPostRAPseudo, should the new instruction be assigned to &MI?

@jchlanda
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@pasaulais I don't think so, doesn't BuildMI take care of that?
In any case this was only an interface change expandPostRAPseudo used to take MI as an iterator, so functionality should be the same.

@frasercrmck
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I see quite a few differences between llvm-mirror/release_39 and this branch. Perhaps it's been updated since? I think we need to update this MR.

@frasercrmck
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I think LLVM 3.9 was released September 2nd, but this was created on August 6th. Further complicating the matter is the fact that release_39 has been updated to 3.9.1.

I think we should re-do this MR on the current release_39 branch, which I don't think will update further. What do you think?

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