Merge branch 'main' of github.com:efabless/EF_UART

efabless · Apr 2, 2024 · 1cdd84d · 1cdd84d
2 parents 5ae8d4c + 852f5f0
commit 1cdd84d
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/hdl/rtl/EF_UART.v b/hdl/rtl/EF_UART.v
@@ -450,9 +450,9 @@ module UART_TX #(parameter NUM_SAMPLES = 16, MDW = 8)(
     reg         tx_reg;         // output data reg
     reg         tx_next;
 
-    	// prepare the data to claculate the parity by removing any extra bits entered
+    // prepare the data to claculate the parity by removing any extra bits entered
 	// by the user by error
-    	wire [MDW-1] pdata = (d_in) & ~({MDW{1'b1}} << data_size);
+    wire [MDW-1:0] pdata = (d_in) & ~({MDW{1'b1}} << data_size);
 
     //State Machine  
     always @(posedge clk, negedge resetn) begin