example: use "la" pseudo-instruction to make templates compatible wit…

…h full GNU tool-chain The included examples can be build by full featured GNU toolchain directly without modifications riscv64-unknown-elf-gcc -march=rv32ima -mabi=ilp32 template-os.S -nostartfiles -nostdlib riscv64-unknown-elf-gcc -march=rv64ima -mabi=lp64 template-os.S -nostartfiles -nostdlib Signed-off-by: Pavel Pisa <[email protected]>
cvut · Oct 3, 2024 · 27528ab · 27528ab
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diff --git a/src/gui/resources/samples/template-os.S b/src/gui/resources/samples/template-os.S
@@ -38,8 +38,9 @@ __start:
 _start:
 	addi  a7, zero, __NR_write        // load syscall number
 	addi  a0, zero, 1                 // load file descriptor
-	addi  a1, zero, text_1            // load text address
-	addi  a2, zero, text_1_e - text_1 // load text length
+	la    a1, text_1                  // load text start address
+	la    a2, text_1_e                // load text end address
+	sub   a2, a2, a1                  // compute text length
 	ecall                             // print the text
 
 	addi  a7, zero, __NR_exit         // load syscall numver
@@ -57,3 +58,12 @@ data_1:	.word	1, 2, 3, 4
 
 text_1:	.ascii	"Hello world.\n"	// store ASCII text, no termination
 text_1_e:
+
+// The sample can be compiled by full-featured riscv64-unknown-elf GNU tool-chain
+// for RV32IMA use
+// riscv64-unknown-elf-gcc -c -march=rv64ima -mabi=lp64 template-os.S
+// riscv64-unknown-elf-gcc -march=rv64ima -mabi=lp64 -nostartfiles -nostdlib template-os.o
+// for RV64IMA use
+// riscv64-unknown-elf-gcc -c -march=rv32ima -mabi=ilp32 template-os.S
+// riscv64-unknown-elf-gcc -march=rv32ima -mabi=ilp32 -nostartfiles -nostdlib template-os.o
+// add "-o template-os" to change default "a.out" output file name
diff --git a/src/gui/resources/samples/template.S b/src/gui/resources/samples/template.S
@@ -88,7 +88,7 @@ _start:
 
 loop:
     li   a0, SERIAL_PORT_BASE           // load base address of serial port
-    addi a1, zero, text_1               // load address of text
+    la   a1, text_1                     // load address of text
 
 next_char:
     lb   t1, 0(a1)                      // load one byte after another
@@ -114,3 +114,12 @@ text_1: .asciz  "Hello world.\n"    // store zero terminated ASCII text
 
 // if whole source compile is OK the switch to core tab
 #pragma qtrvsim tab core
+
+// The sample can be compiled by full-featured riscv64-unknown-elf GNU tool-chain
+// for RV32IMA use
+// riscv64-unknown-elf-gcc -c -march=rv64ima -mabi=lp64 template.S
+// riscv64-unknown-elf-gcc -march=rv64ima -mabi=lp64 -nostartfiles -nostdlib template.o
+// for RV64IMA use
+// riscv64-unknown-elf-gcc -c -march=rv32ima -mabi=ilp32 template.S
+// riscv64-unknown-elf-gcc -march=rv32ima -mabi=ilp32 -nostartfiles -nostdlib template.o
+// add "-o template" to change default "a.out" output file name