Merge pull request cms-sw#30914 from dildick/from-CMSSW_11_1_X_2020-0…

…7-24-1100-check-valid-lcts-v3 Fix broken LCTs reported in HLT_L1SingleMu25 [11_1_X]
cms-patatrack · Jul 31, 2020 · 7ad2e58 · 7ad2e58
2 parents cbb4c23 + 6011f7f
commit 7ad2e58
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Showing 18 changed files with 721 additions and 179 deletions.
diff --git a/DataFormats/CSCDigi/src/CSCCorrelatedLCTDigi.cc b/DataFormats/CSCDigi/src/CSCCorrelatedLCTDigi.cc
@@ -133,17 +133,20 @@ void CSCCorrelatedLCTDigi::print() const {
                                 << " Quality = " << getQuality() << " Key Wire = " << getKeyWG()
                                 << " Strip = " << getStrip() << " Pattern = " << getPattern()
                                 << " Bend = " << ((getBend() == 0) ? 'L' : 'R') << " BX = " << getBX()
-                                << " MPC Link = " << getMPCLink() << " HMT Bit = " << getHMT();
+                                << " MPC Link = " << getMPCLink() << " Type (SIM) = " << getType()
+                                << " HMT Bit = " << getHMT();
   } else {
     edm::LogVerbatim("CSCDigi") << "Not a valid correlated LCT.";
   }
 }
 
 std::ostream& operator<<(std::ostream& o, const CSCCorrelatedLCTDigi& digi) {
   return o << "CSC LCT #" << digi.getTrknmb() << ": Valid = " << digi.isValid() << " Quality = " << digi.getQuality()
-           << " MPC Link = " << digi.getMPCLink() << " cscID = " << digi.getCSCID() << "\n"
+           << " MPC Link = " << digi.getMPCLink() << " cscID = " << digi.getCSCID()
+           << " syncErr = " << digi.getSyncErr() << " Type (SIM) = " << digi.getType() << " HMT Bit = " << digi.getHMT()
+           << "\n"
            << "  cathode info: Strip = " << digi.getStrip() << " Pattern = " << digi.getPattern()
            << " Bend = " << ((digi.getBend() == 0) ? 'L' : 'R') << "\n"
-           << "    anode info: Key wire = " << digi.getKeyWG() << " BX = " << digi.getBX() << " bx0 = " << digi.getBX0()
-           << " syncErr = " << digi.getSyncErr() << " HMT Bit = " << digi.getHMT() << "\n";
+           << "    anode info: Key wire = " << digi.getKeyWG() << " BX = " << digi.getBX()
+           << " bx0 = " << digi.getBX0();
 }
diff --git a/L1Trigger/CSCTriggerPrimitives/interface/CSCAnodeLCTProcessor.h b/L1Trigger/CSCTriggerPrimitives/interface/CSCAnodeLCTProcessor.h
@@ -75,7 +75,7 @@ class CSCAnodeLCTProcessor : public CSCBaseboard {
   std::vector<CSCALCTDigi> readoutALCTs(int nMaxALCTs = CSCConstants::MAX_ALCTS_READOUT) const;
 
   /** Returns vector of all found ALCTs, if any. */
-  std::vector<CSCALCTDigi> getALCTs(int nMaxALCTs = CSCConstants::MAX_ALCTS_READOUT) const;
+  std::vector<CSCALCTDigi> getALCTs(unsigned nMaxALCTs = CSCConstants::MAX_ALCTS_READOUT) const;
 
   /** read out pre-ALCTs */
   std::vector<CSCALCTPreTriggerDigi> preTriggerDigis() const { return thePreTriggerDigis; }
@@ -99,7 +99,7 @@ class CSCAnodeLCTProcessor : public CSCBaseboard {
   CSCALCTDigi secondALCT[CSCConstants::MAX_ALCT_TBINS];
 
   /** LCTs in this chamber, as found by the processor. */
-  CSCALCTDigi ALCTContainer_[CSCConstants::MAX_ALCT_TBINS][CSCConstants::MAX_ALCTS_PER_PROCESSOR];
+  std::vector<std::vector<CSCALCTDigi> > ALCTContainer_;
 
   /** Access routines to wire digis. */
   bool getDigis(const CSCWireDigiCollection* wiredc);
@@ -231,6 +231,10 @@ class CSCAnodeLCTProcessor : public CSCBaseboard {
   /** Dump digis on wire groups. */
   void dumpDigis(const std::vector<int> wire[CSCConstants::NUM_LAYERS][CSCConstants::MAX_NUM_WIRES]) const;
 
+  // Check if the ALCT is valid
+  void checkValidReadout(const CSCALCTDigi& alct) const;
+  void checkValid(const CSCALCTDigi& alct, unsigned max_stubs = CSCConstants::MAX_ALCTS_PER_PROCESSOR) const;
+
   void showPatterns(const int key_wire);
 };
 

diff --git a/L1Trigger/CSCTriggerPrimitives/interface/CSCCathodeLCTProcessor.h b/L1Trigger/CSCTriggerPrimitives/interface/CSCCathodeLCTProcessor.h
@@ -70,7 +70,7 @@ class CSCCathodeLCTProcessor : public CSCBaseboard {
   std::vector<CSCCLCTDigi> readoutCLCTsME1b(int nMaxCLCTs = CSCConstants::MAX_CLCTS_READOUT) const;
 
   /** Returns vector of all found CLCTs, if any. */
-  std::vector<CSCCLCTDigi> getCLCTs() const;
+  std::vector<CSCCLCTDigi> getCLCTs(unsigned nMaxCLCTs = CSCConstants::MAX_CLCTS_PER_PROCESSOR) const;
 
   /** get best/second best CLCT
    * Note: CLCT has BX shifted */
@@ -86,7 +86,7 @@ class CSCCathodeLCTProcessor : public CSCBaseboard {
 
 protected:
   /** LCTs in this chamber, as found by the processor. */
-  CSCCLCTDigi CLCTContainer_[CSCConstants::MAX_CLCT_TBINS][CSCConstants::MAX_CLCTS_PER_PROCESSOR];
+  std::vector<std::vector<CSCCLCTDigi> > CLCTContainer_;
 
   /** Access routines to comparator digis. */
   bool getDigis(const CSCComparatorDigiCollection* compdc);
@@ -138,6 +138,9 @@ class CSCCathodeLCTProcessor : public CSCBaseboard {
   void dumpDigis(const std::vector<int> strip[CSCConstants::NUM_LAYERS][CSCConstants::NUM_HALF_STRIPS_7CFEBS],
                  const int nStrips) const;
 
+  // Check if the CLCT is valid
+  void checkValid(const CSCCLCTDigi& lct, unsigned max_stubs = CSCConstants::MAX_CLCTS_PER_PROCESSOR) const;
+
   //--------------------------- Member variables -----------------------------
 
   /* best pattern Id for a given half-strip */

diff --git a/L1Trigger/CSCTriggerPrimitives/interface/CSCLCTTools.h b/L1Trigger/CSCTriggerPrimitives/interface/CSCLCTTools.h
@@ -0,0 +1,30 @@
+#ifndef L1Trigger_CSCTriggerPrimitives_CSCLCTTools_h
+#define L1Trigger_CSCTriggerPrimitives_CSCLCTTools_h
+
+#include "L1Trigger/CSCCommonTrigger/interface/CSCConstants.h"
+
+#include <cmath>
+#include <tuple>
+
+namespace csctp {
+
+  // CSC max strip & max wire
+  unsigned get_csc_max_wire(int station, int ring);
+  unsigned get_csc_max_halfstrip(int station, int ring);
+  unsigned get_csc_max_quartstrip(int station, int ring);
+  unsigned get_csc_max_eightstrip(int station, int ring);
+
+  // CLCT min, max CFEB numbers
+  std::pair<unsigned, unsigned> get_csc_min_max_cfeb(int station, int ring);
+
+  // CSC min, max pattern
+  std::pair<unsigned, unsigned> get_csc_min_max_pattern(bool isRun3);
+
+  // CSC max quality
+  unsigned get_csc_alct_max_quality(int station, int ring, bool isRun3);
+  unsigned get_csc_clct_max_quality();
+  unsigned get_csc_lct_max_quality();
+
+}  // namespace csctp
+
+#endif
diff --git a/L1Trigger/CSCTriggerPrimitives/interface/CSCMotherboard.h b/L1Trigger/CSCTriggerPrimitives/interface/CSCMotherboard.h
@@ -118,6 +118,9 @@ class CSCMotherboard : public CSCBaseboard {
   unsigned int highMultiplicityBits_;
   bool useHighMultiplicityBits_;
 
+  // Use the new patterns according to the comparator code format
+  bool use_run3_patterns_;
+
   /** Default values of configuration parameters. */
   static const unsigned int def_mpc_block_me1a;
   static const unsigned int def_alct_trig_enable, def_clct_trig_enable;
@@ -165,6 +168,9 @@ class CSCMotherboard : public CSCBaseboard {
   /** Dump TMB/MPC configuration parameters. */
   void dumpConfigParams() const;
 
+  // Check if the LCT is valid
+  void checkValid(const CSCCorrelatedLCTDigi& lct) const;
+
   /* encode high multiplicity bits for Run-3 exotic triggers */
   void encodeHighMultiplicityBits(unsigned alctBits);
 };

diff --git a/L1Trigger/CSCTriggerPrimitives/python/cscTriggerPrimitiveDigis_cfi.py b/L1Trigger/CSCTriggerPrimitives/python/cscTriggerPrimitiveDigis_cfi.py
@@ -371,7 +371,7 @@
 
     ## matching to pads
     maxDeltaBXPad = cms.int32(1),
-    maxDeltaBXCoPad = cms.int32(1),
+    maxDeltaBXCoPad = cms.int32(0),
     maxDeltaPadL1Even = cms.int32(12),
     maxDeltaPadL1Odd = cms.int32(24),
     maxDeltaPadL2Even = cms.int32(12),
@@ -424,7 +424,7 @@
 
     ## matching to pads
     maxDeltaBXPad = cms.int32(1),
-    maxDeltaBXCoPad = cms.int32(1),
+    maxDeltaBXCoPad = cms.int32(0),
     maxDeltaPadL1Even = cms.int32(12),
     maxDeltaPadL1Odd = cms.int32(24),
     maxDeltaPadL2Even = cms.int32(12),
@@ -488,7 +488,7 @@
                                       runME11Up = cms.bool(True),
                                       runME11ILT = cms.bool(True),
                                       useClusters = cms.bool(False),
-                                      enableAlctSLHC = cms.bool(True)),
+                                      enableAlctSLHC = cms.bool(False)),
                    clctSLHC = dict(clctNplanesHitPattern = 3),
                    me11tmbSLHCGEM = me11tmbSLHCGEM,
                    copadParamGE11 = copadParamGE11
@@ -500,13 +500,14 @@
                       commonParam = dict(runME21Up = cms.bool(True),
                                          runME21ILT = cms.bool(True),
                                          runME31Up = cms.bool(True),
-                                         runME41Up = cms.bool(True)),
+                                         runME41Up = cms.bool(True),
+                                         enableAlctSLHC = cms.bool(True)),
                       tmbSLHC = dict(ignoreAlctCrossClct = cms.bool(False)),
                       clctSLHC = dict(useDynamicStateMachineZone = cms.bool(True)),
-                      alctSLHCME21 = cscTriggerPrimitiveDigis.alctSLHC.clone(alctNplanesHitPattern = 3),
+                      alctSLHCME21 = cscTriggerPrimitiveDigis.alctParam07.clone(alctNplanesHitPattern = 3),
                       clctSLHCME21 = cscTriggerPrimitiveDigis.clctSLHC.clone(clctNplanesHitPattern = 3),
                       me21tmbSLHCGEM = me21tmbSLHCGEM,
-                      alctSLHCME3141 = cscTriggerPrimitiveDigis.alctSLHC.clone(alctNplanesHitPattern = 4),
+                      alctSLHCME3141 = cscTriggerPrimitiveDigis.alctParam07.clone(alctNplanesHitPattern = 4),
                       clctSLHCME3141 = cscTriggerPrimitiveDigis.clctSLHC.clone(clctNplanesHitPattern = 4),
                       meX1tmbSLHC = meX1tmbSLHC,
                       copadParamGE11 = copadParamGE11,