Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Cleanup of repositories #46

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
32 changes: 11 additions & 21 deletions bitMapping2.py
Original file line number Diff line number Diff line change
Expand Up @@ -50,12 +50,10 @@ def toStringShort(self):


# Add mappings for a particular BRAM primitive into the mappingsn array and return it
def createBitMapping(
words, bits, cell, mappings, verbose, printMappings
):
def createBitMapping(words, bits, cell, mappings, verbose, printMappings):

# 1. Flag of whether this is RAMB36E cell or not
ramb36 = (cell.type == "RAMB36E1") or (cell.type == "RAMB36E2")
ramb36 = (cell.type == "RAMB36E1") or (cell.type == "RAMB36E2")

# 2. Get the info on this BRAM tile from tilegrid.json
#tilegridname = os.environ["XRAY_DIR"] + "/database/" + os.environ[
Expand Down Expand Up @@ -196,10 +194,9 @@ def createBitMapping(
if printMappings or verbose:
if parity:
print(
"init.mem[{}][{}] -> {}.{}_Y{}.INITP_{:02x}[{:03}]"
.format(
w, b, cell.tile,
cell.type[:-2], y01, initRow, bbb
"init.mem[{}][{}] -> {}.{}_Y{}.INITP_{:02x}[{:03}]".
format(
w, b, cell.tile, cell.type[:-2], y01, initRow, bbb
#cell.tile,
#hex(cell.baseaddr), segoffset[0], segoffset[1],
#cell.wordoffset
Expand All @@ -208,18 +205,17 @@ def createBitMapping(

else:
print(
"init.mem[{}][{}] -> {}.{}_Y{}.INIT_{:02x}[{:03}]"
.format(
w, b, cell.tile,
cell.type[:-2], y01, initRow, bbb
"init.mem[{}][{}] -> {}.{}_Y{}.INIT_{:02x}[{:03}]".
format(
w, b, cell.tile, cell.type[:-2], y01, initRow, bbb
#cell.tile,
#hex(cell.baseaddr), segoffset[0], segoffset[1],
#cell.wordoffset
)
)

# 2.j1: Compute xyz (7 series)
xyz = initRow * 512 + 2*bbb + y01
xyz = initRow * 512 + 2 * bbb + y01
xyz = xyz + 32768 if parity else xyz

# 2.k: Finally, build a Mapping object and add it to the mappings list (to be returned below)
Expand Down Expand Up @@ -321,12 +317,7 @@ def findSegOffset(segs, lr, y01, initinitp, initnum, initbit):
##############################################################################################
# Create the bitmappings for a design
##############################################################################################
def createBitMappings(
memName,
mddName,
verbose,
printMappings
):
def createBitMappings(memName, mddName, verbose, printMappings):

# 1. Load the MDD file.
mdd_data = parse_mdd.readAndFilterMDDData(mddName, memName)
Expand Down Expand Up @@ -382,8 +373,7 @@ def mapSort(m):
baseDir = pathlib.Path(args.baseDir).resolve()

mappings = createBitMappings(
args.memname, baseDir / args.mddname, args.verbose,
args.printmappings
args.memname, baseDir / args.mddname, args.verbose, args.printmappings
)

# Since this is a test program, print out what was returned
Expand Down
126 changes: 126 additions & 0 deletions bits2init.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,126 @@
import os
import sys
import parseutil
import parseutil.misc as misc
import argparse
import pathlib
import DbgParser
import bitMapping
import patch_mem


# Check the bits for a complete memory
def bits2init(
baseDir, # pathlib.Path
memName, # str
mdd, # pathlib.Path
initFile, # pathlib.Path
origInitFile, # if not None then will do checking between it and re-created initFile on the previous line
fasmFile, # pathlib.Path
verbose, # bool
printmappings # bool
):
designName = baseDir.name

# 0. Read the MDD data and filter out the ones we want for this memory
mdd_data = patch_mem.readAndFilterMDDData(mdd, memName)
words, initbitwidth = misc.getMDDMemorySize(mdd_data)

# 1. Get the mapping info
print("Loading mappings for {}...".format(designName))
mappings = bitMapping.createBitMappings(
baseDir, # The directory where the design lives
memName,
mdd,
False,
printmappings
)
print(" Done loading mappings")

# 2. Get the frames
frames = DbgParser.loadFrames(
baseDir / "vivado" / "{}.bit".format(designName)
)

# 3. Make arrays to hold the new init data
initArrays = [[None for j in range(initbitwidth)] for k in range(words)]
initStrings = [None for j in range(words)]

# 4. Use mappings to take the frame data, and make ordered arrays of data
print("Assembling init strings for {}".format(designName))
for mapping in mappings:
frameWord = int(mapping.frameBitOffset / 32)
frameBit = mapping.frameBitOffset % 32
binaryWord = bin(frames[mapping.frameAddr][frameWord])[2:]
binaryWord = ('0' * (32 - len(binaryWord))) + binaryWord
binaryWord = binaryWord[::-1]
initArrays[mapping.word][mapping.bit] = binaryWord[frameBit]

# 5. Combine the arrays into new init strings
for i in range(words):
string = "".join(initArrays[i])
string = string[::-1]
initStrings[i] = string

# 5a. Check the new strings against existing .mem files
# Only checks if the --check flag was set
if origInitFile is not None:
print(" Checking with original...")
origInit = parseutil.parse_init_test.read_initfile(
origInitFile, initbitwidth, reverse=False
)
for w in range(words):
for b in range(initbitwidth):
if initStrings[w][b] != origInit[w][b]:
print(
"Mismatch: {}:{} {} {}".format(
w, b, initStrings[w][b], origInit[w][b]
)
)
print(
"original: {}\nnew: {}".format(
hex(int(origInit[w], 2)),
hex(int(initStrings[w], 2))
)
)
sys.exit(1)
print(" Everything checked out successfully!!!")
print(" Done assembling init strings")
print("Writing to {}/init/new.mem".format(designName))

# 6. Writes the string to new.mem in the init directory of a design
with (baseDir / "init" / "new.mem").open('w') as f:
for string in initStrings:
f.write(hex(int(string, 2))[2:])
f.write("\n")
print(" Done writing file")


if __name__ == "__main__":
parser = argparse.ArgumentParser()
parser.add_argument(
"baseDir", help='Directory where design sub-directories are located.'
)

parser.add_argument(
"memname", help='Name of memory to check (as in "mem/ram")'
)
parser.add_argument("mddname", help='Name of mdd file)')
parser.add_argument("--verbose", action='store_true')
parser.add_argument("--check", action='store_true')
parser.add_argument(
"--printmappings", action='store_true', help='Print the mapping info'
)
args = parser.parse_args()

baseDir = pathlib.Path(args.baseDir).resolve()
designName = baseDir.name

bits2init(
baseDir, args.memname, baseDir / args.mddname,
baseDir / "init/fromFasm.mem",
baseDir / "init/init.mem" if args.check == True else None,
baseDir / "real.fasm", args.verbose, args.printmappings
)

print("")
45 changes: 45 additions & 0 deletions bits2init_all.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
import checkTheBits
import argparse
import pathlib
import bits2init


def designSizes(designName):
words = designName.split('b')[0]
if words[-1] == 'k':
words = int(words[:-1]) * 1024
else:
words = int(words)
bits = int(designName.split('b')[1])
return (words, bits)


if __name__ == "__main__":
parser = argparse.ArgumentParser()
parser.add_argument(
"baseDir", help='Directory where design sub-directories are located.'
)

parser.add_argument("--verbose", action='store_true')

parser.add_argument(
"--printmappings", action='store_true', help='Print the mapping info'
)

args = parser.parse_args()

baseDir = pathlib.Path(args.baseDir).resolve()
dirs = list(baseDir.glob("*"))
dirs.sort()

for d in dirs:
designName = d.name
words, bits = designSizes(designName)
print(designName)
bits2init.bits2init(
d, "mem/ram", d / "{}.mdd".format(designName), d / "init/new.mem",
d / "init/init.mem", d / "real.fasm", args.verbose,
args.printmappings
)
print("")
print("")
Loading