Revert "fix: have MIPS revert on add/sub overflow/underflow (#230)" (e…

…thereum-optimism#279) This reverts commit 864e59a821e87f9dd00ae97f85add93fa3857597.
celo-org · Aug 16, 2024 · c464ba7 · c464ba7
1 parent 1fd43ea
commit c464ba7
Show file tree

Hide file tree

Showing 25 changed files with 26 additions and 473 deletions.
diff --git a/cannon/mipsevm/exec/mips_instructions.go b/cannon/mipsevm/exec/mips_instructions.go
@@ -240,29 +240,11 @@ func ExecuteMipsInstruction(insn, opcode, fun, rs, rt, mem uint32) uint32 {
 			return rs
 		// The rest includes transformed R-type arith imm instructions
 		case 0x20: // add
-			intRs := int32(rs)
-			intRt := int32(rt)
-			intRes := intRs + intRt
-			if intRs > 0 && intRt > 0 && intRes <= 0 {
-				panic("MIPS: add overflow")
-			}
-			if intRs < 0 && intRt < 0 && intRes >= 0 {
-				panic("MIPS: add underflow")
-			}
-			return uint32(intRes)
+			return rs + rt
 		case 0x21: // addu
 			return rs + rt
 		case 0x22: // sub
-			intRs := int32(rs)
-			intRt := int32(rt)
-			intRes := intRs - intRt
-			if intRs > 0 && intRt < 0 && intRes < 0 {
-				panic("MIPS: sub overflow")
-			}
-			if intRs < 0 && intRt > 0 && intRes > 0 {
-				panic("MIPS: sub underflow")
-			}
-			return uint32(intRes)
+			return rs - rt
 		case 0x23: // subu
 			return rs - rt
 		case 0x24: // and

diff --git a/cannon/mipsevm/tests/open_mips_tests/test/add_overflow_panic.asm b/cannon/mipsevm/tests/open_mips_tests/test/add_overflow_panic.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/add_underflow_panic.asm b/cannon/mipsevm/tests/open_mips_tests/test/add_underflow_panic.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/addi_overflow_panic.asm b/cannon/mipsevm/tests/open_mips_tests/test/addi_overflow_panic.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/addi_underflow_panic.asm b/cannon/mipsevm/tests/open_mips_tests/test/addi_underflow_panic.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/addu_overflow.asm b/cannon/mipsevm/tests/open_mips_tests/test/addu_overflow.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/add_overflow_panic.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/add_overflow_panic.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/add_underflow_panic.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/add_underflow_panic.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/addi_overflow_panic.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/addi_overflow_panic.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/addi_underflow_panic.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/addi_underflow_panic.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/addu_overflow.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/addu_overflow.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/sub_overflow_panic.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/sub_overflow_panic.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/sub_underflow_panic.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/sub_underflow_panic.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/bin/subu_underflow.bin b/cannon/mipsevm/tests/open_mips_tests/test/bin/subu_underflow.bin
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/sub_overflow_panic.asm b/cannon/mipsevm/tests/open_mips_tests/test/sub_overflow_panic.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/sub_underflow_panic.asm b/cannon/mipsevm/tests/open_mips_tests/test/sub_underflow_panic.asm
diff --git a/cannon/mipsevm/tests/open_mips_tests/test/subu_underflow.asm b/cannon/mipsevm/tests/open_mips_tests/test/subu_underflow.asm
diff --git a/packages/contracts-bedrock/semver-lock.json b/packages/contracts-bedrock/semver-lock.json
@@ -140,11 +140,11 @@
     "sourceCodeHash": "0x3ff4a3f21202478935412d47fd5ef7f94a170402ddc50e5c062013ce5544c83f"
   },
   "src/cannon/MIPS.sol": {
-    "initCodeHash": "0xc783f01a426b889cd80d242cf01901fc34c595e59e74d50e3a0a8cb1fa226b3f",
+    "initCodeHash": "0x328f14e6c171957a5225378f0b49e3dd5e92c6ddc815552216ce066415bf972a",
     "sourceCodeHash": "0xfa6e6eacba6be2c9489f828f8a50dda40565eef5c73a2cf8e274e1fd4410d38a"
   },
   "src/cannon/MIPS2.sol": {
-    "initCodeHash": "0xeac747751362183e6e0e4caa34f07284823449867897a39bd036db5ea189e2c7",
+    "initCodeHash": "0x69bfafb485944e36f95a1123e0da5c7da09cde23a216d0402d3219d2a8df410d",
     "sourceCodeHash": "0x115bd6a4c4d77ed210dfd468675b409fdae9f79b932063c138f0765ba9063462"
   },
   "src/cannon/PreimageOracle.sol": {

diff --git a/packages/contracts-bedrock/snapshots/state-diff/Kontrol-31337.json b/packages/contracts-bedrock/snapshots/state-diff/Kontrol-31337.json
diff --git a/packages/contracts-bedrock/src/cannon/libraries/MIPSInstructions.sol b/packages/contracts-bedrock/src/cannon/libraries/MIPSInstructions.sol
@@ -364,25 +364,15 @@ library MIPSInstructions {
                 // The rest includes transformed R-type arith imm instructions
                 // add
                 else if (_fun == 0x20) {
-                    int32 rs = int32(_rs);
-                    int32 rt = int32(_rt);
-                    int32 res = rs + rt;
-                    require(!(rs > 0 && rt > 0 && res <= 0), "MIPS: add overflow");
-                    require(!(rs < 0 && rt < 0 && res >= 0), "MIPS: add underflow");
-                    return uint32(res);
+                    return (_rs + _rt);
                 }
                 // addu
                 else if (_fun == 0x21) {
                     return (_rs + _rt);
                 }
                 // sub
                 else if (_fun == 0x22) {
-                    int32 rs = int32(_rs);
-                    int32 rt = int32(_rt);
-                    int32 res = rs - rt;
-                    require(!(rs > 0 && rt < 0 && res <= 0), "MIPS: sub overflow");
-                    require(!(rs < 0 && rt > 0 && res >= 0), "MIPS: sub underflow");
-                    return uint32(res);
+                    return (_rs - _rt);
                 }
                 // subu
                 else if (_fun == 0x23) {