🎨 refactoring.

bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/detect_bdl_pairs.hpp

@@ -29,7 +29,7 @@ void detect_bdl_pairs(pybind11::module& m)
 {
     using namespace pybind11::literals;
 
-    m.def("detect_bdl_pairs", &fiction::detect_bdl_pairs<Lyt>, "lyt"_a, "type"_a = nullptr,
+    m.def("detect_bdl_pairs", &fiction::detect_bdl_pairs<Lyt>, "lyt"_a, "type"_a = std::nullopt,
           "params"_a = fiction::detect_bdl_pairs_params{}, DOC(fiction_detect_bdl_pairs));
 }
 

bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/detect_bdl_wires.hpp

@@ -11,56 +11,91 @@
 #include <pybind11/pybind11.h>
 #include <pybind11/stl.h>
 
+#include <string>  // Included for std::string
 #include <vector>
 
 namespace pyfiction
 {
 
+// todo update documentation
+
 namespace detail
 {
 
+/**
+ * @brief Registers the `bdl_wire` class and `detect_bdl_wires` function for a specific lattice type.
+ *
+ * @tparam Lyt The lattice type.
+ * @param m The pybind11 module.
+ * @param suffix The suffix to append to the class and function names to distinguish between different lattice types.
+ */
 template <typename Lyt>
-void detect_bdl_wires(pybind11::module& m)
+void detect_bdl_wires(pybind11::module& m, const std::string& suffix = "")
 {
     using namespace pybind11::literals;
+    namespace py = pybind11;
 
-    m.def("detect_bdl_wires", &fiction::detect_bdl_wires<Lyt>, "lyt"_a, "params"_a = fiction::detect_bdl_wires_params{},
-          "wire_selection"_a = fiction::bdl_wire_selection::ALL);
+    using bdl_wire_t = fiction::bdl_wire<Lyt>;
+
+    // Construct the class name based on the suffix
+    std::string class_name = "bdl_wire";
+    if (!suffix.empty())
+    {
+        class_name += "_" + suffix;
+    }
+
+    // Register the bdl_wire class with the appropriate suffix
+    py::class_<bdl_wire_t>(m, class_name.c_str(), DOC(fiction_bdl_wire))
+        .def(py::init<>())                                                                  // Default constructor
+        .def(py::init<std::vector<fiction::bdl_pair<fiction::offset::ucoord_t>>>(), "p"_a)  // Constructor with pairs
+        .def_readwrite("pairs", &bdl_wire_t::pairs, DOC(fiction_bdl_wire_pairs))            // Expose the pairs member
+        .def_readwrite("direction", &bdl_wire_t::direction,
+                       DOC(fiction_bdl_wire_direction))  // Expose the direction member
+        .def_readwrite("start_bdl_pair_wire",
+                       &bdl_wire_t::start_bdl_pair_wire)                      // Expose the start_bdl_pair_wire member
+        .def_readwrite("end_bdl_pair_wire", &bdl_wire_t::end_bdl_pair_wire);  // Expose the end_bdl_pair_wire member
+
+    // Register the detect_bdl_wires function with a unique name based on the suffix
+    std::string func_name = "detect_bdl_wires";
+    if (!suffix.empty())
+    {
+        func_name += "_" + suffix;
+    }
+
+    m.def(func_name.c_str(), &fiction::detect_bdl_wires<Lyt>, "lyt"_a, "params"_a = fiction::detect_bdl_wires_params{},
+          "wire_selection"_a = fiction::bdl_wire_selection::ALL, DOC(fiction_detect_bdl_wires));
 }
 
 }  // namespace detail
 
+/**
+ * @brief Registers all `bdl_wire` classes, enums, and related functions with the pybind11 module.
+ *
+ * @param m The pybind11 module.
+ */
 inline void detect_bdl_wires(pybind11::module& m)
 {
     namespace py = pybind11;
     using namespace pybind11::literals;
 
-    py::class_<fiction::bdl_wire<fiction::offset::ucoord_t>>(m, "bdl_wire")
-        .def(py::init<>())
-        .def(py::init<std::vector<fiction::bdl_pair<fiction::offset::ucoord_t>>>(), "p"_a, DOC(fiction_bdl_wire))
-        .def_readwrite("pairs", &fiction::bdl_wire<fiction::offset::ucoord_t>::pairs, DOC(fiction_bdl_wire_pairs))
-        .def_readwrite("direction", &fiction::bdl_wire<fiction::offset::ucoord_t>::direction,
-                       DOC(fiction_bdl_wire_direction));
-
-    py::enum_<fiction::bdl_wire_direction>(m, "bdl_wire_direction")
-        .value("NORTH_SOUTH", fiction::bdl_wire_direction::NORTH_SOUTH)
-        .value("SOUTH_NORTH", fiction::bdl_wire_direction::SOUTH_NORTH)
-        .value("NO_DIRECTION", fiction::bdl_wire_direction::NO_DIRECTION);
-
-    py::enum_<fiction::bdl_wire_selection>(m, "bdl_wire_selection")
-        .value("ALL", fiction::bdl_wire_selection::ALL)
-        .value("INPUT", fiction::bdl_wire_selection::INPUT)
-        .value("OUTPUT", fiction::bdl_wire_selection::OUTPUT);
-
-    py::class_<fiction::detect_bdl_wires_params>(m, "detect_bdl_wires_params")
-        .def(py::init<>())
-        .def_readwrite("threshold_bdl_interdistance", &fiction::detect_bdl_wires_params::threshold_bdl_interdistance)
-        .def_readwrite("bdl_pairs_params", &fiction::detect_bdl_wires_params::bdl_pairs_params);
-
-    // NOTE be careful with the order of the following calls! Python will resolve the first matching overload!
-
-    detail::detect_bdl_wires<py_sidb_100_lattice>(m);
-    detail::detect_bdl_wires<py_sidb_111_lattice>(m);
+    // Enum for wire selection options
+    py::enum_<fiction::bdl_wire_selection>(m, "bdl_wire_selection", DOC(fiction_bdl_wire_selection))
+        .value("ALL", fiction::bdl_wire_selection::ALL, DOC(fiction_bdl_wire_selection_ALL))
+        .value("INPUT", fiction::bdl_wire_selection::INPUT, DOC(fiction_bdl_wire_selection_INPUT))
+        .value("OUTPUT", fiction::bdl_wire_selection::OUTPUT, DOC(fiction_bdl_wire_selection_OUTPUT))
+        .export_values();  // Export enum values to Python namespace
+
+    // Class for detect_bdl_wires_params
+    py::class_<fiction::detect_bdl_wires_params>(m, "detect_bdl_wires_params", DOC(fiction_detect_bdl_wires_params))
+        .def(py::init<>())  // Default constructor
+        .def_readwrite("threshold_bdl_interdistance", &fiction::detect_bdl_wires_params::threshold_bdl_interdistance,
+                       DOC(fiction_detect_bdl_wires_params_threshold_bdl_interdistance))
+        .def_readwrite("bdl_pairs_params", &fiction::detect_bdl_wires_params::bdl_pairs_params,
+                       DOC(fiction_detect_bdl_wires_params_bdl_pairs_params));
+
+    // Register different lattice types with appropriate suffixes
+    detail::detect_bdl_wires<py_sidb_100_lattice>(m, "100");
+    detail::detect_bdl_wires<py_sidb_111_lattice>(m, "111");
 }
 
 }  // namespace pyfiction

bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp

@@ -27,7 +27,7 @@ void is_operational(pybind11::module& m)
     using namespace pybind11::literals;
 
     m.def("is_operational", &fiction::is_operational<Lyt, py_tt>, "lyt"_a, "spec"_a,
-          "params"_a = fiction::is_operational_params{}, "input_bdl_wire"_a = nullptr, "output_bdl_wire"_a = nullptr,
+          "params"_a = fiction::is_operational_params{}, "input_bdl_wire"_a = std::nullopt, "output_bdl_wire"_a = std::nullopt,
           DOC(fiction_is_operational));
 
     m.def("operational_input_patterns", &fiction::operational_input_patterns<Lyt, py_tt>, "lyt"_a, "spec"_a,
@@ -46,9 +46,9 @@ inline void is_operational(pybind11::module& m)
                DOC(fiction_operational_status_NON_OPERATIONAL));
 
     py::enum_<fiction::operational_condition>(m, "operational_condition", DOC(fiction_operational_condition))
-        .value("ALLOWING_KINKS", fiction::operational_condition::ALLOWING_KINKS,
+        .value("TOLERATE_KINKS", fiction::operational_condition::TOLERATE_KINKS,
                DOC(fiction_operational_condition_ALLOWING_KINKS))
-        .value("FORBIDDING_KINKS", fiction::operational_condition::FORBIDDING_KINKS,
+        .value("REJECT_KINKS", fiction::operational_condition::REJECT_KINKS,
                DOC(fiction_operational_condition_FORBIDDING_KINKS));
 
     py::class_<fiction::is_operational_params>(m, "is_operational_params", DOC(fiction_is_operational_params))

bindings/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py

@@ -79,7 +79,7 @@ def test_nor_gate_111(self):
         params.canvas = [(10, 22), (14, 34)]
         params.number_of_sidbs = 3
         params.operational_params.sim_engine = sidb_simulation_engine.QUICKEXACT
-        params.operational_params.op_condition = operational_condition.FORBIDDING_KINKS
+        params.operational_params.op_condition = operational_condition.REJECT_KINKS
 
         self.assertEqual(params.operational_params.simulation_parameters.mu_minus, -0.32)
         self.assertEqual(params.number_of_sidbs, 3)
@@ -89,8 +89,8 @@ def test_nor_gate_111(self):
         designed_gates = design_sidb_gates(layout, [create_nor_tt()], params)
         self.assertEqual(len(designed_gates), 44)
 
-        # allowing kink states
-        params.operational_params.op_condition = operational_condition.ALLOWING_KINKS
+        # tolerate kink states
+        params.operational_params.op_condition = operational_condition.TOLERATE_KINKS
         designed_gates = design_sidb_gates(layout, [create_nor_tt()], params)
         self.assertEqual(len(designed_gates), 175)
 

bindings/pyfiction/test/algorithms/simulation/sidb/test_detect_bdl_wires.py

@@ -34,9 +34,9 @@ def test_detect_bdl_wires_100_lattice(self):
 
         params = detect_bdl_wires_params()
 
-        all_bdl_wires = detect_bdl_wires(lyt, params, bdl_wire_selection.ALL)
-        output_bdl_wires = detect_bdl_wires(lyt, params, bdl_wire_selection.OUTPUT)
-        input_bdl_wires = detect_bdl_wires(lyt, params, bdl_wire_selection.INPUT)
+        all_bdl_wires = detect_bdl_wires_100(lyt, params, bdl_wire_selection.ALL)
+        output_bdl_wires = detect_bdl_wires_100(lyt, params, bdl_wire_selection.OUTPUT)
+        input_bdl_wires = detect_bdl_wires_100(lyt, params, bdl_wire_selection.INPUT)
 
         self.assertEqual(len(all_bdl_wires), 3)
         self.assertEqual(len(output_bdl_wires), 2)

bindings/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py

@@ -50,7 +50,7 @@ def test_and_gate_kinks(self):
 
         self.assertEqual(op_status, operational_status.OPERATIONAL)
 
-        params.op_condition = operational_condition.FORBIDDING_KINKS
+        params.op_condition = operational_condition.REJECT_KINKS
 
         [op_status, evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params)
 

experiments/quickcell/quickcell_3_input.cpp

@@ -54,7 +54,7 @@ int main()  // NOLINT
     const design_sidb_gates_params<fiction::cell<sidb_100_cell_clk_lyt_siqad>> params{
         is_operational_params{sidb_simulation_parameters{2, -0.31}, sidb_simulation_engine::QUICKEXACT,
                               bdl_input_iterator_params{detect_bdl_wires_params{3.0}},
-                              operational_condition::FORBIDDING_KINKS},
+                              operational_condition::REJECT_KINKS},
         design_sidb_gates_params<fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::QUICKCELL,
         {{22, 6, 0}, {32, 12, 0}},
         4};

experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp

@@ -59,15 +59,15 @@ int main()  // NOLINT
 
     design_sidb_gates_params<fiction::cell<sidb_100_cell_clk_lyt_siqad>> params_2_in_1_out{
         is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT,
-                              bdl_input_iterator_params{}, operational_condition::FORBIDDING_KINKS},
+                              bdl_input_iterator_params{}, operational_condition::REJECT_KINKS},
         design_sidb_gates_params<
             fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER,
         {{14, 6, 0}, {24, 10, 0}},
         3};
 
     design_sidb_gates_params<fiction::cell<sidb_100_cell_clk_lyt_siqad>> params_2_in_2_out{
         is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT,
-                              bdl_input_iterator_params{}, operational_condition::FORBIDDING_KINKS},
+                              bdl_input_iterator_params{}, operational_condition::REJECT_KINKS},
         design_sidb_gates_params<
             fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER,
         {{14, 6, 0}, {24, 14, 0}},
@@ -86,10 +86,10 @@ int main()  // NOLINT
 
         params_2_in_1_out.design_mode = design_sidb_gates_params<
             fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
-        params_2_in_1_out.operational_params.op_condition = operational_condition::FORBIDDING_KINKS;
+        params_2_in_1_out.operational_params.op_condition = operational_condition::REJECT_KINKS;
         params_2_in_2_out.design_mode                     = design_sidb_gates_params<
                                 fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
-        params_2_in_2_out.operational_params.op_condition = operational_condition::FORBIDDING_KINKS;
+        params_2_in_2_out.operational_params.op_condition = operational_condition::REJECT_KINKS;
 
         if (gate_names[i] == "cx" || gate_names[i] == "ha" || gate_names[i] == "hourglass")
         {