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Implement memory read
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fmckeogh committed May 9, 2024
1 parent dabc31b commit bf1c017
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Showing 6 changed files with 48 additions and 27 deletions.
12 changes: 0 additions & 12 deletions borealis/src/brig/denylist.rs
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,6 @@ const DENYLIST: &[&'static str] = &[
"HaveBRBEv1p1",
"BranchRecordAllowed",
"ELIsInHost",
"S1TranslationRegime__1",
"IsInHost",
"BRBEMispredictAllowed",
"BRBCycleCountingEnabled",
Expand Down Expand Up @@ -183,9 +182,6 @@ const DENYLIST: &[&'static str] = &[
"NonSecureOnlyImplementation",
"DBGOSLSR_read",
"TranslationRegime",
"AlignmentEnforced",
"CPASAtPAS",
"CPASAtSecurityState",
"ICInstNeedsTranslation",
"DCInstNeedsTranslation",
"DecodeSW",
Expand Down Expand Up @@ -227,11 +223,6 @@ const DENYLIST: &[&'static str] = &[
"EAEisOne",
"CONTEXTIDR_NS_read",
"CONTEXTIDR_read",
"TTBR0_read",
"TTBR0_EL1_read",
"TTBR0_EL2_read",
"TTBR1_read",
"TTBR1_EL1_read",
"ASID_read",
"RecipEstimate",
"UnsignedRecipEstimate",
Expand Down Expand Up @@ -565,8 +556,6 @@ const DENYLIST: &[&'static str] = &[
"SPESetDataPhysicalAddress",
"SPESetDataVirtualAddress",
"SPESampleLoadStore",
"Mem_read__1",
"Mem_read__2",
"Mem_set__1",
"Mem_set__2",
"MemAtomic",
Expand Down Expand Up @@ -1542,7 +1531,6 @@ const DENYLIST: &[&'static str] = &[
"read_request",
"sail_mem_write",
"write_request",
"CACHE_OP",
"take_exception",
"gic_readonly",
"__ReadUART",
Expand Down
14 changes: 13 additions & 1 deletion borealis/src/brig/functions_interpreter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -135,7 +135,19 @@ pub fn codegen_stmt(stmt: Statement) -> TokenStream {
}
}
}
StatementKind::ReadMemory { .. } => quote!(todo!("read-mem")),
StatementKind::ReadMemory { offset, size } => {
// read `size` bytes at `offset`, return a Bits
let offset = get_ident(&offset);
let size = get_ident(&size);

quote! {
{
let address = #offset as usize + state.guest_memory_base();
let value = unsafe { *(address as *const u128) };
Bits::new(value, #size as u16)
}
}
}
StatementKind::WriteMemory { offset, value } => {
let offset = get_ident(&offset);

Expand Down
6 changes: 5 additions & 1 deletion borealis/src/rudder/analysis/dfa.rs
Original file line number Diff line number Diff line change
Expand Up @@ -128,6 +128,10 @@ impl StatementUseAnalysis {
StatementKind::ReadRegister { offset, .. } => {
self.add_use(&offset, &stmt);
}
StatementKind::ReadMemory { offset, size } => {
self.add_use(&offset, &stmt);
self.add_use(&size, &stmt);
}
StatementKind::WriteMemory { offset, value } => {
self.add_use(&offset, &stmt);
self.add_use(&value, &stmt);
Expand Down Expand Up @@ -237,7 +241,7 @@ impl StatementUseAnalysis {
StatementKind::ExtractField { value, .. } => self.add_use(&value, &stmt),

StatementKind::ReadVariable { symbol, indices } => {}
StatementKind::ReadMemory { typ, offset } => {}

StatementKind::ReadPc => {}
StatementKind::Jump { target } => {}
StatementKind::PhiNode { members } => {}
Expand Down
20 changes: 11 additions & 9 deletions borealis/src/rudder/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1144,14 +1144,15 @@ impl<'ctx: 'fn_ctx, 'fn_ctx> BlockBuildContext<'ctx, 'fn_ctx> {
value: value_in_name,
}))
}
// "Mem_read" => {
// let address = args[0].clone();
// let _size = args[1].clone();
// let _accdesc = args[2].clone();
// let _value_in_name = args[3].clone();

// Some(self.builder.build(StatementKind::ReadMemory { typ: (), offset: address }))
// }
"Mem_read" | "Mem_read_1" | "Mem_read_2" => {
let address = args[0].clone();
let size = args[1].clone();

Some(self.builder.build(StatementKind::ReadMemory {
offset: address,
size,
}))
}
"HaveEL" => {
let two = self.builder.build(StatementKind::Constant {
typ: Arc::new(Type::new_primitive(
Expand Down Expand Up @@ -1185,7 +1186,8 @@ impl<'ctx: 'fn_ctx, 'fn_ctx> BlockBuildContext<'ctx, 'fn_ctx> {
| "sail_tlbi"
| "prerr_bits"
| "prerr_int"
| "write_tag#" => Some(self.builder.build(StatementKind::Constant {
| "write_tag#"
| "sail_cache_op" => Some(self.builder.build(StatementKind::Constant {
typ: Arc::new(Type::unit()),
value: ConstantValue::Unit,
})),
Expand Down
19 changes: 17 additions & 2 deletions borealis/src/rudder/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -321,8 +321,8 @@ pub enum StatementKind {
},

ReadMemory {
typ: Arc<Type>,
offset: Statement,
size: Statement,
},
WriteMemory {
offset: Statement,
Expand Down Expand Up @@ -632,7 +632,7 @@ impl Statement {
StatementKind::WriteVariable { .. } => Arc::new(Type::void()),
StatementKind::ReadRegister { typ, .. } => typ,
StatementKind::WriteRegister { .. } => Arc::new(Type::unit()),
StatementKind::ReadMemory { typ, .. } => typ,
StatementKind::ReadMemory { .. } => Arc::new(Type::Bits),
StatementKind::WriteMemory { .. } => Arc::new(Type::unit()),
StatementKind::BinaryOperation {
kind: BinaryOperationKind::CompareEqual,
Expand Down Expand Up @@ -934,6 +934,21 @@ impl StatementInner {

self.kind = StatementKind::WriteMemory { offset, value }
}
StatementKind::ReadMemory { offset, size } => {
let offset = if offset == use_of {
with.clone()
} else {
offset.clone()
};

let size = if size == use_of {
with.clone()
} else {
size.clone()
};

self.kind = StatementKind::ReadMemory { offset, size }
}

StatementKind::ReadElement { vector, index } => {
let vector = if vector == use_of {
Expand Down
4 changes: 2 additions & 2 deletions borealis/src/rudder/pretty_print.rs
Original file line number Diff line number Diff line change
Expand Up @@ -84,8 +84,8 @@ impl Display for StatementKind {
StatementKind::WriteRegister { offset, value } => {
write!(f, "write-reg {} <= {}", offset.name(), value.name())
}
StatementKind::ReadMemory { typ, offset } => {
write!(f, "read-mem {}:{}", offset.name(), typ)
StatementKind::ReadMemory { offset, size } => {
write!(f, "read-mem {}:{}", offset.name(), size.name())
}
StatementKind::WriteMemory { offset, value } => {
write!(f, "write-mem {} <= {}", offset.name(), value.name())
Expand Down

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