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Emit JIB to writer not stdout, add memory read/write tracing
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fmckeogh committed May 6, 2024
1 parent 4f4dcb5 commit 0ff5d28
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Showing 10 changed files with 151 additions and 141 deletions.
7 changes: 3 additions & 4 deletions Cargo.lock

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2 changes: 1 addition & 1 deletion borealis/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ proc-macro2 = "1.0.81"
memmap2 = "0.9.4"
rkyv = {version = "0.7.44", default-features = false, features = ["std", "alloc", "size_64"] }
parking_lot = "0.12.2"
cargo-util-schemas = "0.2.0"
cargo-util-schemas = "0.3.0"
toml = "0.8.12"
semver = { version = "1.0.22", features = ["serde"] }
walkdir = "2.5.0"
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28 changes: 1 addition & 27 deletions borealis/src/brig/denylist.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1357,13 +1357,8 @@ const DENYLIST: &[&'static str] = &[
"decode_aarch32_instrs_SSAT16_T1enc_A_txt",
"execute_aarch32_instrs_SSAT_Op_A_txt",
"decode_aarch32_instrs_SSAT_A1enc_A_txt",
"decode_aarch32_instrs_SSAT_T1enc_A_txt",
"execute_aarch32_instrs_SSAX_Op_A_txt",
"decode_aarch32_instrs_SSAX_A1enc_A_txt",
"decode_aarch32_instrs_SSAX_T1enc_A_txt",
"execute_aarch32_instrs_SSUB16_Op_A_txt",
"decode_aarch32_instrs_SSUB16_A1enc_A_txt",
"decode_aarch32_instrs_SSUB16_T1enc_A_txt",
"execute_aarch32_instrs_SSUB8_Op_A_txt",
"decode_aarch32_instrs_SSUB8_A1enc_A_txt",
"decode_aarch32_instrs_SSUB8_T1enc_A_txt",
Expand Down Expand Up @@ -2199,11 +2194,6 @@ const DENYLIST: &[&'static str] = &[
"execute_aarch32_instrs_MSR_br_Op_AS_txt",
"decode_aarch32_instrs_MSR_br_A1enc_AS_txt",
"decode_aarch32_instrs_MSR_br_T1enc_AS_txt",
"execute_aarch32_instrs_MSR_i_Op_AS_txt",
"decode_aarch32_instrs_MSR_i_A1enc_AS_txt",
"execute_aarch32_instrs_MSR_r_Op_AS_txt",
"decode_aarch32_instrs_MSR_r_A1enc_AS_txt",
"decode_aarch32_instrs_MSR_r_T1enc_AS_txt",
"execute_aarch32_instrs_RFE_Op_AS_txt",
"decode_aarch32_instrs_RFE_A1enc_AS_txt",
"decode_aarch32_instrs_RFE_T1enc_AS_txt",
Expand Down Expand Up @@ -2448,7 +2438,7 @@ const DENYLIST: &[&'static str] = &[
"UnallocatedT32_32_Instruction",
"UnallocatedT32_16_Instruction",
"__DefaultCond",
"ExecuteA64",
"ExecuteA64", // remove me next
"ExecuteA32",
"ExecuteT32__1",
"ExecuteT16",
Expand Down Expand Up @@ -2485,16 +2475,6 @@ const DENYLIST: &[&'static str] = &[
"CreatePhysMemRetStatus",
"PhysMemRead",
"PhysMemWrite",
"__DecodeA32_Unconditional",
"__DecodeA32_DataProMisc",
"__DecodeA32_LoadStoreImmLit",
"__DecodeA32_LoadStoreReg",
"__DecodeA32_Media",
"__DecodeA32_BranchBlock",
"__DecodeA32_SysASIMDFP",
"__DecodeT32",
"__DecodeT16",
"__DecodeA32",
"__EndCycle",
"__ListConfig",
"__Reset",
Expand All @@ -2514,12 +2494,6 @@ const DENYLIST: &[&'static str] = &[
"ChooseRandomNonExcludedTag",
"CommitTransactionalWrites",
"ComputePACIMPDEF",
"ConstrainUnpredictable",
"ConstrainUnpredictableBits",
"ConstrainUnpredictableBool",
"ConstrainUnpredictableInteger",
"ConstrainUnpredictableProcedure",
"ConsumptionOfSpeculativeDataBarrier",
"DC_CIGDPAPA",
"DC_CIPAPA",
"DiscardTransactionalWrites",
Expand Down
36 changes: 28 additions & 8 deletions borealis/src/brig/functions_interpreter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -159,20 +159,40 @@ pub fn codegen_stmt(stmt: Statement) -> TokenStream {
};

quote! {
match #length {
8 => unsafe { *((#offset as usize + state.guest_memory_base()) as *mut u8) = #value as u8; },
16 => unsafe { *((#offset as usize + state.guest_memory_base()) as *mut u16) = #value as u16; },
32 => unsafe { *((#offset as usize + state.guest_memory_base()) as *mut u32) = #value as u32; },
64 => unsafe { *((#offset as usize + state.guest_memory_base()) as *mut u64) = #value as u64; },
_ => panic!("unsupported length")
{
let address = #offset as usize + state.guest_memory_base();

match #length {
8 => {
let value = #value as u8;
tracer.write_memory(address, value);
unsafe { *(address as *mut u8) = value; }
},
16 => {
let value = #value as u16;
tracer.write_memory(address, value);
unsafe { *(address as *mut u16) = value; }
},
32 => {
let value = #value as u32;
tracer.write_memory(address, value);
unsafe { *(address as *mut u32) = value; }
},
64 => {
let value = #value as u64;
tracer.write_memory(address, value);
unsafe { *(address as *mut u64) = value; }
},
_ => panic!("unsupported length")
}
}
}
}
StatementKind::ReadPc => quote!(todo!("read-pc")),
StatementKind::WritePc { .. } => quote!(todo!("write-pc")),
StatementKind::BinaryOperation { kind, lhs, rhs } => {
let mut left = get_ident(&lhs);
let mut right = get_ident(&rhs);
let left = get_ident(&lhs);
let right = get_ident(&rhs);

// // hard to decide whether this belongs, but since it's a Rust issue that u1
// is // not like other types, casting is a codegen thing
Expand Down
24 changes: 18 additions & 6 deletions borealis/src/brig/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,8 @@ use {
regex::Regex,
sailrs::{jib_ast, types::ListVec},
std::{
collections::BTreeSet,
fs::create_dir_all,
hash::{DefaultHasher, Hash, Hasher},
io::Write,
path::PathBuf,
Expand All @@ -57,8 +59,15 @@ pub fn sail_to_brig(
path: PathBuf,
dump_ir: Option<PathBuf>,
) {
if let Some(_) = &dump_ir {
sailrs::jib_ast::pretty_print::print_ast(jib_ast.iter());
if let Some(path) = &dump_ir {
create_dir_all(path).unwrap()
}

if let Some(path) = &dump_ir {
sailrs::jib_ast::pretty_print::print_ast(
&mut create_file(path.join("ast.jib")).unwrap(),
jib_ast.iter(),
);
}

info!("Converting JIB to BOOM");
Expand All @@ -67,7 +76,7 @@ pub fn sail_to_brig(
// // useful for debugging
if let Some(path) = &dump_ir {
boom::pretty_print::print_ast(
&mut create_file(path.join("ast_raw.boom")).unwrap(),
&mut create_file(path.join("ast.boom")).unwrap(),
ast.clone(),
);
}
Expand All @@ -87,7 +96,7 @@ pub fn sail_to_brig(

if let Some(path) = &dump_ir {
boom::pretty_print::print_ast(
&mut create_file(path.join("ast_processed.boom")).unwrap(),
&mut create_file(path.join("ast.processed.boom")).unwrap(),
ast.clone(),
);
}
Expand Down Expand Up @@ -265,7 +274,7 @@ fn codegen_types(rudder: &Context) -> TokenStream {
.collect();

quote! {
#[derive(Default, Debug, Clone, Copy)]
#[derive(Default, Debug, Clone, Copy, PartialEq)]
#[repr(C)]
pub struct #ident {
#fields
Expand Down Expand Up @@ -295,7 +304,7 @@ fn codegen_types(rudder: &Context) -> TokenStream {
.collect();

quote! {
#[derive(Debug, Clone, Copy)]
#[derive(Debug, Clone, Copy, PartialEq)]
pub enum #ident {
#variants
}
Expand Down Expand Up @@ -343,6 +352,8 @@ fn codegen_workspace(rudder: &Context) -> (HashMap<PathBuf, String>, HashSet<Pat
fn end(&self);
fn read_register<T: core::fmt::Debug>(&self, offset: isize, value: T);
fn write_register<T: core::fmt::Debug>(&self, offset: isize, value: T);
fn read_memory<T: core::fmt::Debug>(&self, address: usize, value: T);
fn write_memory<T: core::fmt::Debug>(&self, address: usize, value: T);
}

#[derive(Debug)]
Expand Down Expand Up @@ -449,6 +460,7 @@ fn codegen_workspace(rudder: &Context) -> (HashMap<PathBuf, String>, HashSet<Pat
}),
badges: None,
lints: None,
_unused_keys: BTreeSet::new(),
})
.unwrap(),
);
Expand Down
3 changes: 2 additions & 1 deletion borealis/src/brig/workspace.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ use {
common::{intern::InternedString, HashMap, HashSet},
semver::{BuildMetadata, Prerelease, Version},
std::{
collections::BTreeMap,
collections::{BTreeMap, BTreeSet},
fs::{self, read_to_string},
path::{Path, PathBuf},
},
Expand Down Expand Up @@ -194,5 +194,6 @@ pub fn create_manifest(
workspace: None,
badges: None,
lints: None,
_unused_keys: BTreeSet::new(),
}
}
7 changes: 1 addition & 6 deletions borealis/src/rudder/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -366,12 +366,7 @@ impl<'ctx: 'fn_ctx, 'fn_ctx> BlockBuildContext<'ctx, 'fn_ctx> {
fallthrough: boom_fallthrough,
} => {
let condition = self.build_value(Shared::new(condition));
let typ = condition.typ();

if *typ != Type::u1() {
// so far this todo is never hit, but if you do hit it implement it pls
todo!("insert cast from {} to u1", condition.typ());
}
let condition = self.builder.generate_cast(condition, Arc::new(Type::u1()));

let rudder_true_target = self.fn_ctx().resolve_block(boom_target);
let rudder_false_target = self.fn_ctx().resolve_block(boom_fallthrough);
Expand Down
2 changes: 1 addition & 1 deletion common/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ authors = ["AVISI Research Group"]
[dependencies]
ocaml = { version = "1.0.0-beta.5", features = ["no-panic-hook"] }
deepsize = "0.2.0"
lasso = { version = "0.7.2", features = ["multi-threaded", "deepsize", "serialize"] }
lasso = { git = "https://github.com/lcnr/lasso", rev = "87767f5", features = ["multi-threaded", "deepsize", "serialize"] }
once_cell = "1.19.0"
serde = { version = "1.0.199", features = ["derive"] }
twox-hash = "1.6.3"
Expand Down
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