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ERROR: [DRC RTSTAT-6] Partial route conflicts: 746 net(s) have a partial conflict. The problem bus(es) and/or net(s) are x_cpu_top/CPU/x_cr_had_top/A15d/A13e[0], x_cpu_top/CPU/x_cr_had_top/A15d/A13e[3], x_cpu_top/CPU/x_cr_had_top/A15d/A13e[6], x_cpu_top/CPU/x_cr_had_top/A15d/A13e[12], x_cpu_top/CPU/x_cr_had_top/A18545/A91, x_cpu_top/CPU/x_cr_had_top/A18545/A145[9], x_cpu_top/CPU/x_cr_had_top/A18545/A145[19], x_cpu_top/CPU/x_cr_had_top/A18545/A146[2], x_cpu_top/CPU/x_cr_had_top/A18545/A147[12], x_cpu_top/CPU/x_cr_had_top/A18545/A147[27], x_cpu_top/CPU/x_cr_had_top/A18545/A147[30], x_cpu_top/CPU/x_cr_had_top/A18545/A148[5], x_cpu_top/CPU/x_cr_had_top/A18545/A1855b[5], x_cpu_top/CPU/x_cr_had_top/A18545/A1855b[7], x_cpu_top/CPU/x_cr_had_top/A18545/A1861c[4:0]... and (the first 15 of 738 listed).
The text was updated successfully, but these errors were encountered:
"WARNING: [Common 17-306] Update version (2017.2_AR69663) does not match product version (2017.4).
****** Vivado v2017.4_AR69663 (64-bit)
**** SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
**** IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
couldn't load library "librdi_tcltasks.dll": A function specified in the import table could not be resolved by the system. Windows is not telling which one, I'm sorry.
Could not load library 'librdi_tcltasks' needed by 'core', please check installation.
while executing
"error "$result\nCould not load library '$library' needed by '$feature', please check installation.""
(procedure "rdi::load_library" line 4)
invoked from within
"rdi::load_library core librdi_tcltasks"
(file "D:/Xilinx/Vivado/2017.4\lib\scripts\rdi\features\core\core.tcl" line 5)
ERROR: [Common 17-217] Failed to load feature 'core'.
INFO: [Common 17-206] Exiting Vivado at Mon Oct 28 09:04:30 2019..."
The 2 pathches of this link is only for Vivado 2017.2/2017.2.1, maybe you should tell the developers which version of the vivado you're using, it can save a lot of time.
Synplify Pro J-2015.03
Vivado 2017.4
ERROR: [DRC RTSTAT-6] Partial route conflicts: 746 net(s) have a partial conflict. The problem bus(es) and/or net(s) are x_cpu_top/CPU/x_cr_had_top/A15d/A13e[0], x_cpu_top/CPU/x_cr_had_top/A15d/A13e[3], x_cpu_top/CPU/x_cr_had_top/A15d/A13e[6], x_cpu_top/CPU/x_cr_had_top/A15d/A13e[12], x_cpu_top/CPU/x_cr_had_top/A18545/A91, x_cpu_top/CPU/x_cr_had_top/A18545/A145[9], x_cpu_top/CPU/x_cr_had_top/A18545/A145[19], x_cpu_top/CPU/x_cr_had_top/A18545/A146[2], x_cpu_top/CPU/x_cr_had_top/A18545/A147[12], x_cpu_top/CPU/x_cr_had_top/A18545/A147[27], x_cpu_top/CPU/x_cr_had_top/A18545/A147[30], x_cpu_top/CPU/x_cr_had_top/A18545/A148[5], x_cpu_top/CPU/x_cr_had_top/A18545/A1855b[5], x_cpu_top/CPU/x_cr_had_top/A18545/A1855b[7], x_cpu_top/CPU/x_cr_had_top/A18545/A1861c[4:0]... and (the first 15 of 738 listed).
The text was updated successfully, but these errors were encountered: