Releases
v0.2.0
Added
ffi
feature to enable repr(C)
on some structs and enums.
Implement MemoryAccess trait for [u8]
, &[u8]
, [u16]
and &[u16]
.
Line A and line F emulator exceptions.
Added with_sr
function for Registers
.
Changed
Change license from LGPL-3.0 to MPL-2.0.
Separate the C interface from the main crate.
CPU behavior is now controlled using a trait and generic member instead of features (breaking).
Move the register access helper methods to the Registers struct.
Status Register's default function returns a SR with value 0x2700 (breaking).
Use wrapping types and methods so overflow checks can be enabled.
Make MemoryIter generic over the underlying MemoryAccess trait object.
Removed
M68000 does not store the cycles count anymore (breaking).
Fixed
Fix ADDQ/SUBQ immediate data 0 not interpreted as 8.
Fix ADDQ/SUBQ truncating address registers.
Fix immediate Shift/Rotate count of 0 not disassembled as 8.
Fix ABCD/NBCD/SBCD.
Fix DIVS/DIVU changing the destination even when an overflow occured.
Interrupt's exception processing sets the interrupt priority mask.
Interrupt level 7 is non-maskable.
Privileged instructions can't trigger Trace exceptions.
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