Introduce fractional gates #1734
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docs/guides/fractional-gates.ipynb
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| "# Draw timeline of circuit with conventional gates\n", | ||
| "draw_timeline(ising_circuit_conventional, idle_wires=False, time_range=(0, 500), style=IQXSimple())" |
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are these draw_timeline functions supposed to print out an image? I don't see anything in the preview
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They will, the code won't work until the use_fractional_gates flag is enabled. That's part of why I put in the temporary code to show what the images will look like.
docs/guides/fractional-gates.ipynb
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| "For workflows that require many single qubit $R_X(\\theta)$ or two-qubit rotations, especially ones where the rotation angle $\\theta$ is small (such as in a variational ansatze or when simulating the time evolution of quantum systems), this constraint causes the circuit depth to grow quite quickly. Thankfully however, the fleet of IBM Quantum QPUs now support *fractional gates* which can significantly reduce the circuit depth for workflows like these." |
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I think this info could be brought out in the first paragraph before launching into the code examples, otherwise I feel like I have to read a lot before I get to the point. I think generally a better format for short-attention-span-readers (i.e. most docs readers lets be honest 😆) is to make the point in the first paragraph and then evidence it with code examples second
Co-authored-by: Abby Mitchell <[email protected]>
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docs/guides/fractional-gates.ipynb
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| "# Fractional gates\n", | ||
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| "This page introduces two newly supported gate types on the IBM Quantum fleet of QPUs. These *fractional* gates are supported on:\n", |
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This is not correct. Eagle must implement RZX and Heron must implement RZZ. Unfortunately we don't plan to provide fractional gates for Eagle, so in here you can just say fractional gates will be provided with Heron devices.
docs/guides/fractional-gates.ipynb
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| "## How to use fractional gates\n", | ||
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| "Internally, these fractional gates work by dynamically modifying the microwave pulses that are sent to individual qubits based on the angle, $\\theta$, that a circuit instruction specifies. This has the advantage of shorter gate durations -- and thus lower dephasing error, especially for small angles -- which reduces the overall circuit duration, in addition to the cost savings of executing fewer gates.\n", |
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This is bit misleading because we don't shorten pulse duration with the modification. We can reduce gate count by directly implementing RZZ and RX, and thus we can reduce the circuit duration. Gate duration will be the same.
docs/guides/fractional-gates.ipynb
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| "backend = service.least_busy(use_fractional_gates=True)\n", | ||
| "```\n", | ||
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| "To demonstrate how to use fractional gates, the code example below depicts an example workflow of simulating the dynamics of an Ising chain using fractional gates. Then the circuit duration is compared against a backend which does not use fractional gates." |
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Maybe it's worth showing control flow instructions such as if_else and for_loop will be removed (and thus we can support fractional gates and control flow only exclusively). It is important to say that this behavior might change in the future as our backend software stack evolves.
docs/guides/fractional-gates.ipynb
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| "## Where to use fractional gates\n", | ||
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| "Historically, the basis gates available on QPUs in the fleet of IBM Quantum hardware have been **`ECR`**, **`X`**, **`RZ`**, **`SX`**, and **`ID`** which creates a constraint on circuits with single and two-qubit rotations. For example, an $R_X(\\theta)$ gate, when transpiled to a QPU in the IBM Quantum fleet, must decompose into a series of $RZ$ and $\\sqrt{X}$ gates -- creating a circuit with a depth of five instead of one.\n", |
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RZ is virtual-Z gate and zero cost. Here you can replace two physical pulses implementing SX gates with one pulse.
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For the initial release, we are just adding rzz and rx on Heron. Additional gates for Eagle will come later.
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In terms of describing the benefit, we can be more concrete. Specifically:
With rx gates, all single-qubit rotations (u3) can be achieved with a single control pulse, rather than being decomposed into two sx gates and three rz gates. This reduces the duration and error for single-qubit gates by up to a factor of two.
Similarly, with rzz gates, this avoids a decomposition into multiple cz gates for a common operation in time evolution circuits.
Also, can we please also show an example of using use_fractional_gates with service.backend(...)? The least_busy(...) method is also not guaranteed to return a Heron processor, which is necessary for these examples to work.
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This paragraph needs to be updated to reference the ISA of the Heron processors, which is cz based rather than ecr.
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In addition to the comments I added from ReviewNB, we also need a section on when NOT to use fractional gates. In particular, we currently do not support using fractional gates with dynamic circuits or with any error mitigation features of the Qiskit Runtime. Furthermore, the Qiskit transpiler has limited capability to use |
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One other comment is that we support rzz(theta) for theta in the range of [0, pi].
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Got it, is that also true for the rx(theta) gate?
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No Rx supports full range.
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The range of rzz is [0, pi/2].
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@abbycross Can you also mention that the "error" value of rx (rzz) gate reported in Since gate time of fractional/non-fractional gates are the same, we can expect their error values are also almost comparable when dominant source of error is relaxation, but they could differ because of the difference in calibration protocol. |
Just added this as a note in the first section of the page. @blakejohnson and @javabster I believe this page should be ready to go now that fractional gates are live. |
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@kaelynj Can you please check again my comments? Some of them were not addressed. Thanks. |
Closes #1527 ~~Currently blocked by #1734 which will need to be merged before CI passes.~~ Utilizing fractional gates is a flag that is set when requesting a backend from a `QiskitRuntimeService()` instance and there didn't appear to be a clear page for a flag to be explained. I ended up adding it as an admonition to the "get started with primitives" page. --------- Co-authored-by: Eric Arellano <[email protected]>
Closes #1526 (and will likely close #1471 @lerongil).
FYI @nbronn here's the draft of the fractional gates page.