Remove non existent links

Qiskit · Nov 13, 2024 · 34a866b · 34a866b
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commit 34a866b
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diff --git a/docs/guides/ai-transpiler-passes.mdx b/docs/guides/ai-transpiler-passes.mdx
@@ -54,7 +54,7 @@ The `layout_mode` includes the following options:
 
 ## AI circuit synthesis passes
 
-The AI circuit synthesis passes allow you to optimize pieces of different circuit types ([Clifford](/api/qiskit/qiskit.quantum_info.Clifford), [Linear Function](/api/qiskit/qiskit.circuit.library.LinearFunction), [Permutation](/api/qiskit/qiskit.circuit.library.Permutation#permutation), [Pauli Network](/api/qiskit/qiskit.circuit.library.PauliNetwork)) by re-synthesizing them. A typical way to use the synthesis pass is as follows:
+The AI circuit synthesis passes allow you to optimize pieces of different circuit types ([Clifford](/api/qiskit/qiskit.quantum_info.Clifford), [Linear Function](/api/qiskit/qiskit.circuit.library.LinearFunction), [Permutation](/api/qiskit/qiskit.circuit.library.Permutation#permutation), Pauli Network) by re-synthesizing them. A typical way to use the synthesis pass is as follows:
 
 ```python
 from qiskit.transpiler import PassManager
@@ -86,7 +86,7 @@ The following synthesis passes are available from `qiskit_ibm_transpiler.ai.synt
 - *AICliffordSynthesis*: Synthesis for [Clifford](/api/qiskit/qiskit.quantum_info.Clifford) circuits (blocks of `H`, `S`, and `CX` gates). Currently up to nine qubit blocks.
 - *AILinearFunctionSynthesis*: Synthesis for [Linear Function](/api/qiskit/qiskit.circuit.library.LinearFunction) circuits (blocks of `CX` and `SWAP` gates). Currently up to nine qubit blocks.
 - *AIPermutationSynthesis*: Synthesis for [Permutation](/api/qiskit/qiskit.circuit.library.Permutation#permutation) circuits (blocks of `SWAP` gates). Currently available for 65, 33, and 27 qubit blocks.
-- *AIPauliNetworkSynthesis*: Synthesis for [Pauli Network](/api/qiskit/qiskit.circuit.library.PauliNetwork) circuits (blocks of `H`, `S`, `SX`, `CX`, `RX`, `RY` and `RZ` gates). Currently up to six qubit blocks.
+- *AIPauliNetworkSynthesis*: Synthesis for Pauli Network circuits (blocks of `H`, `S`, `SX`, `CX`, `RX`, `RY` and `RZ` gates). Currently up to six qubit blocks.
 
 We expect to gradually increase the size of the supported blocks.