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@Purdue-SoCET

Purdue System on Chip Extension Technologies

A student team working on designing and testing an SoC at Purdue University

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  1. RISCVBusiness RISCVBusiness Public

    Forked from JakeStevens/RISCVBusiness

    SystemVerilog 8 3

  2. vortex vortex Public

    Forked from vortexgpgpu/vortex

    Verilog 4 1

  3. AFTx06_Caravel AFTx06_Caravel Public

    Verilog 3 2

  4. AFTx05_Public AFTx05_Public Public

    Verilog 2 1

  5. SAFE SAFE Public

    Python 2 2

  6. FPU FPU Public

    Floating-point unit for RISC-V core

    SystemVerilog 2 1

Repositories

Showing 10 of 41 repositories
  • Purdue-SoCET/chiplet-components’s past year of commit activity
    SystemVerilog 0 0 0 0 Updated Jan 24, 2025
  • amp-compiler Public
    Purdue-SoCET/amp-compiler’s past year of commit activity
    0 0 0 0 Updated Jan 22, 2025
  • amp-llvm Public Forked from llvm/llvm-project

    The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.

    Purdue-SoCET/amp-llvm’s past year of commit activity
    LLVM 0 12,753 0 0 Updated Jan 22, 2025
  • Purdue-SoCET/RISCVBusiness’s past year of commit activity
    SystemVerilog 8 8 1 (1 issue needs help) 4 Updated Jan 16, 2025
  • vortex-f24 Public Forked from vortexgpgpu/vortex
    Purdue-SoCET/vortex-f24’s past year of commit activity
    Verilog 1 Apache-2.0 281 0 0 Updated Dec 4, 2024
  • tc-kernels Public
    Purdue-SoCET/tc-kernels’s past year of commit activity
    Python 0 0 0 0 Updated Dec 2, 2024
  • FPU Public

    Floating-point unit for RISC-V core

    Purdue-SoCET/FPU’s past year of commit activity
    SystemVerilog 2 1 0 0 Updated Nov 24, 2024
  • intro-socet Public
    Purdue-SoCET/intro-socet’s past year of commit activity
    SystemVerilog 0 1 0 0 Updated Nov 22, 2024
  • vito-uart Public
    Purdue-SoCET/vito-uart’s past year of commit activity
    SystemVerilog 0 Apache-2.0 2 1 0 Updated Nov 10, 2024
  • tt09-purdue-socet Public

    Purdue SoCET - 11/2024 Tapeout with Tiny Tapeout

    Purdue-SoCET/tt09-purdue-socet’s past year of commit activity
    SystemVerilog 0 Apache-2.0 0 0 0 Updated Nov 10, 2024

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