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minor refactoring;
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NateSeymour committed Dec 29, 2024
1 parent 8e2539d commit f4d37b5
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Showing 34 changed files with 166 additions and 179 deletions.
32 changes: 16 additions & 16 deletions CMakeLists.txt
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Expand Up @@ -60,26 +60,26 @@ add_library(city
src/ir/instruction/control/RetInst.cpp
src/ir/instruction/control/BranchInst.cpp
src/ir/instruction/memory/StoreInst.cpp
src/backend/x86/x86.cpp
src/backend/x86/x86.h
src/backend/IRTranslationInterface.h
src/backend/x86/x86TranslationInterface.cpp
src/backend/x86/x86TranslationInterface.h
src/backend/x86/instruction/x86Instruction.cpp
src/backend/x86/instruction/x86Instruction.h
src/backend/x86/instruction/arithmetic/x86AddRM32Inst.h
src/backend/amd64/Amd64.cpp
src/backend/amd64/Amd64.h
src/backend/IRTranslator.h
src/backend/amd64/Amd64Translator.cpp
src/backend/amd64/Amd64Translator.h
src/backend/amd64/instruction/Amd64Instruction.cpp
src/backend/amd64/instruction/Amd64Instruction.h
src/backend/amd64/instruction/arithmetic/x86AddRM32Inst.h
src/ByteBuffer.h
src/backend/x86/instruction/arithmetic/x86AddMI32Inst.h
src/backend/amd64/instruction/arithmetic/x86AddMI32Inst.h
src/ir/instruction/InstructionFunctor.h
src/backend/NativeInstruction.cpp
src/backend/NativeInstruction.h
src/backend/x86/x86Register.cpp
src/backend/x86/x86Register.h
src/backend/x86/x86ModRM.h
src/backend/x86/instruction/memory/Amd64PushO64.h
src/backend/x86/instruction/memory/Amd64MovMR64.h
src/backend/x86/instruction/memory/Amd64PopO64.h
src/backend/x86/instruction/control/Amd64RetZONear.h
src/backend/amd64/Amd64Register.cpp
src/backend/amd64/Amd64Register.h
src/backend/amd64/Amd64ModRM.h
src/backend/amd64/instruction/memory/Amd64PushO64.h
src/backend/amd64/instruction/memory/Amd64MovMR64.h
src/backend/amd64/instruction/memory/Amd64PopO64.h
src/backend/amd64/instruction/control/Amd64RetZONear.h
src/runtime/Windows.cpp
src/runtime/Windows.h
src/Object.cpp
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4 changes: 2 additions & 2 deletions src/backend/Backend.cpp
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Expand Up @@ -4,11 +4,11 @@ using namespace city;

#ifdef __x86_64__

#include "x86/x86.h"
#include "amd64/Amd64.h"

std::unique_ptr<Backend> Backend::CreateHostNative()
{
return std::make_unique<x86>();
return std::make_unique<Amd64>();
}

#elifdef __aarch64__
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Expand Up @@ -10,11 +10,11 @@ namespace city
{
};

struct IRTranslationInterface : InstructionFunctor<IRTranslationResult>
struct IRTranslator : InstructionFunctor<IRTranslationResult>
{
NativeModule &object;
NativeModule &module;

explicit IRTranslationInterface(NativeModule &object) : object(object) {}
explicit IRTranslator(NativeModule &native_module) : module(native_module) {}
};
} // namespace city

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47 changes: 47 additions & 0 deletions src/backend/amd64/Amd64.cpp
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@@ -0,0 +1,47 @@
#include "Amd64.h"
#include "Amd64Translator.h"
#include "instruction/memory/Amd64MovMR64.h"
#include "instruction/memory/Amd64PopO64.h"
#include "instruction/memory/Amd64PushO64.h"
#include "ir/Block.h"
#include "ir/Function.h"
#include "ir/instruction/IRInstruction.h"

using namespace city;

std::array<Amd64Register, 8> const x86_register_definitions = {
Amd64Register(Amd64RegisterCode::XMM0),
Amd64Register(Amd64RegisterCode::XMM1),
Amd64Register(Amd64RegisterCode::XMM2),
Amd64Register(Amd64RegisterCode::XMM3),
Amd64Register(Amd64RegisterCode::XMM4),
Amd64Register(Amd64RegisterCode::XMM5),
Amd64Register(Amd64RegisterCode::XMM6),
Amd64Register(Amd64RegisterCode::XMM7),
};

NativeModule Amd64::BuildModule(IRModule &module)
{
NativeModule object{};

Amd64Translator translator{object};
for (auto &function : module.functions_)
{
// Function Prolog
auto entry = object.EmplaceInstruction<Amd64PushO64>(Amd64RegisterCode::RBP);
entry->SetLabel(function->name_);

object.EmplaceInstruction<Amd64MovMR64>(Amd64RegisterCode::RBP, Amd64RegisterCode::RSP);

// Function Body
for (auto block : function->blocks_)
{
for (auto &instruction : block->instructions_)
{
instruction->Apply(&translator);
}
}
}

return std::move(object);
}
9 changes: 1 addition & 8 deletions src/backend/x86/x86.h → src/backend/amd64/Amd64.h
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@@ -1,21 +1,14 @@
#ifndef X86_64_H
#define X86_64_H

#include <array>
#include <cstdint>
#include "backend/Backend.h"
#include "x86Register.h"

namespace city
{
class x86 : public Backend
class Amd64 : public Backend
{
std::array<x86Register, 8> registers_;

public:
[[nodiscard]] NativeModule BuildModule(IRModule &module) override;

x86();
};
} // namespace city

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4 changes: 2 additions & 2 deletions src/backend/x86/x86ModRM.h → src/backend/amd64/Amd64ModRM.h
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Expand Up @@ -5,15 +5,15 @@

namespace city
{
enum class x86Mod : std::uint8_t
enum class Amd64Mod : std::uint8_t
{
Memory = 0x0,
MemoryD8 = 0x1,
MemoryD32 = 0x2,
Register = 0x3,
};

enum class x86RegisterCode : std::uint8_t
enum class Amd64RegisterCode : std::uint8_t
{
AL = 0x0,
AX = 0x0,
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6 changes: 6 additions & 0 deletions src/backend/amd64/Amd64Register.cpp
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@@ -0,0 +1,6 @@

#include "Amd64Register.h"

using namespace city;

Amd64Register::Amd64Register(Amd64RegisterCode code) : code_(code) {}
Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
#ifndef CITY_X86REGISTER_H
#define CITY_X86REGISTER_H

#include "Amd64ModRM.h"
#include "ir/Container.h"
#include "x86ModRM.h"

namespace city
{
class x86Register : public Container
class Amd64Register : public Container
{
x86RegisterCode code_;
Amd64RegisterCode code_;

public:
x86Register(x86RegisterCode code);
Amd64Register(Amd64RegisterCode code);
};
} // namespace city

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24 changes: 24 additions & 0 deletions src/backend/amd64/Amd64Translator.cpp
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@@ -0,0 +1,24 @@
#include "Amd64Translator.h"
#include "backend/amd64/instruction/control/Amd64RetZONear.h"
#include "backend/amd64/instruction/memory/Amd64PopO64.h"

using namespace city;

IRTranslationResult Amd64Translator::Translate(AddInst *instruction) {}

IRTranslationResult Amd64Translator::Translate(BranchInst *instruction) {}

IRTranslationResult Amd64Translator::Translate(RetInst *instruction)
{
if (instruction->HasReturnValue())
{
auto return_value = instruction->GetReturnValue();
}

this->module.EmplaceInstruction<Amd64PopO64>(Amd64RegisterCode::RBP);
this->module.EmplaceInstruction<Amd46RetZONear>();

return {};
}

IRTranslationResult Amd64Translator::Translate(StoreInst *instruction) {}
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@@ -1,18 +1,20 @@
#ifndef X86_64TRANSLATIONINTERFACE_H
#define X86_64TRANSLATIONINTERFACE_H

#include "backend/IRTranslationInterface.h"
#include <array>
#include "Amd64Register.h"
#include "backend/IRTranslator.h"

namespace city
{
struct x86TranslationInterface : IRTranslationInterface
struct Amd64Translator : IRTranslator
{
IRTranslationResult Translate(AddInst *instruction) override;
IRTranslationResult Translate(BranchInst *instruction) override;
IRTranslationResult Translate(RetInst *instruction) override;
IRTranslationResult Translate(StoreInst *instruction) override;

explicit x86TranslationInterface(NativeModule &object) : IRTranslationInterface(object) {}
explicit Amd64Translator(NativeModule &object) : IRTranslator(object) {}
};
} // namespace city

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@@ -1,9 +1,9 @@
#include "x86Instruction.h"
#include "Amd64Instruction.h"
#include <cstring>

using namespace city;

size_t x86Instruction::GetBinarySize() const noexcept
size_t Amd64Instruction::GetBinarySize() const noexcept
{
std::size_t size = 0;

Expand All @@ -16,7 +16,7 @@ size_t x86Instruction::GetBinarySize() const noexcept
return size;
}

size_t x86Instruction::WriteToBuffer(std::byte *buffer) const
size_t Amd64Instruction::WriteToBuffer(std::byte *buffer) const
{
std::byte *buffer_it = buffer;

Expand Down Expand Up @@ -44,22 +44,22 @@ size_t x86Instruction::WriteToBuffer(std::byte *buffer) const
return buffer_it - buffer;
}

void x86Instruction::SetPrefix(std::initializer_list<std::uint8_t> bytes)
void Amd64Instruction::SetPrefix(std::initializer_list<std::uint8_t> bytes)
{
this->prefix_ = bytes;
}

void x86Instruction::SetOpcode(std::initializer_list<std::uint8_t> bytes)
void Amd64Instruction::SetOpcode(std::initializer_list<std::uint8_t> bytes)
{
this->opcode_ = bytes;
}

void x86Instruction::SetImmediate(std::initializer_list<std::uint8_t> bytes)
void Amd64Instruction::SetImmediate(std::initializer_list<std::uint8_t> bytes)
{
this->immediate_ = bytes;
}

void x86Instruction::SetModRM(x86RegisterCode reg, x86RegisterCode r_m, x86Mod mod)
void Amd64Instruction::SetModRM(Amd64RegisterCode reg, Amd64RegisterCode r_m, Amd64Mod mod)
{
auto breg = static_cast<std::uint8_t>(reg);
auto br_m = static_cast<std::uint8_t>(r_m);
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Original file line number Diff line number Diff line change
Expand Up @@ -5,14 +5,15 @@
#include <cstdint>
#include "ByteBuffer.h"
#include "backend/NativeInstruction.h"
#include "backend/x86/x86.h"
#include "backend/amd64/Amd64.h"
#include "backend/amd64/Amd64ModRM.h"

namespace city
{
/**
* Container to hold x86 maximum prefix size (3 bytes).
*/
using x86Prefix = ByteBuffer<3>;
using Amd64Prefix = ByteBuffer<3>;

enum class Amd64PrefixCode : std::uint8_t
{
Expand All @@ -22,25 +23,25 @@ namespace city
/**
* Container to hold the x86 maximum opcode size (3 bytes).
*/
using x86Opcode = ByteBuffer<3>;
using Amd64Opcode = ByteBuffer<3>;

/**
* Container to hold the x86 maximum immediate size (8 bytes == 1QW).
*/
using x86Immediate = ByteBuffer<8>;
using Amd64Immediate = ByteBuffer<8>;

class x86Instruction : public NativeInstruction
class Amd64Instruction : public NativeInstruction
{
x86Prefix prefix_ = {};
x86Opcode opcode_ = {};
Amd64Prefix prefix_ = {};
Amd64Opcode opcode_ = {};

bool has_mod_rm_ = false;
std::uint8_t mod_rm_ = 0x0;

bool has_sib_ = false;
std::uint8_t sib_ = 0x0;

x86Immediate immediate_ = {};
Amd64Immediate immediate_ = {};

public:
[[nodiscard]] size_t GetBinarySize() const noexcept override;
Expand All @@ -57,7 +58,7 @@ namespace city
* @param mod Addressing Mode
* @return ModR/M
*/
void SetModRM(x86RegisterCode reg, x86RegisterCode r_m, x86Mod mod);
void SetModRM(Amd64RegisterCode reg, Amd64RegisterCode r_m, Amd64Mod mod);
};
} // namespace city

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@@ -1,11 +1,11 @@
#ifndef X86ADDMI32INST_H
#define X86ADDMI32INST_H

#include "backend/x86/instruction/x86Instruction.h"
#include "backend/amd64/instruction/Amd64Instruction.h"

namespace city
{
class x86AddMI32Inst : public x86Instruction
class x86AddMI32Inst : public Amd64Instruction
{
};
} // namespace city
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@@ -1,15 +1,15 @@
#ifndef X86ADDRM32INST_H
#define X86ADDRM32INST_H

#include "backend/x86/instruction/x86Instruction.h"
#include "backend/amd64/instruction/Amd64Instruction.h"
#include "ir/value/Value.h"

namespace city
{
/**
* ADD r32, r/m32
*/
class x86AddRM32Inst : public x86Instruction
class x86AddRM32Inst : public Amd64Instruction
{
public:
x86AddRM32Inst(Value *dst, Value *src)
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@@ -1,11 +1,11 @@
#ifndef CITY_AMD64RETZONEAR_H
#define CITY_AMD64RETZONEAR_H

#include "backend/x86/instruction/x86Instruction.h"
#include "backend/amd64/instruction/Amd64Instruction.h"

namespace city
{
class Amd46RetZONear : public x86Instruction
class Amd46RetZONear : public Amd64Instruction
{
public:
Amd46RetZONear()
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