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1. SoC-Gulp SoC-Gulp Public

   SoC设计流程总结，主要包括项目初始化/git仓库管理/验证环境搭建/memory生成替换/FPGA环境构建/ASIC环境构建/signoff环境构建等flow

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2. chisel-template chisel-template Public

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3. rocket-chip rocket-chip Public

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4. Verilog-FixedPoint Verilog-FixedPoint Public

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   Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version.

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5. dc-syn-demo dc-syn-demo Public

   synopsys design compiler use demo

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6. wake wake Public

   Forked from sifive/wake

   The SiFive wake build tool

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