Merge pull request #979 from arturum1/main

 Update `default.nix`, py2hwsw version, license headers. Update iob-soc to support new Tester.

.github/workflows/ci.yml

@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2024 IObundle
+# SPDX-FileCopyrightText: 2025 IObundle
 #
 # SPDX-License-Identifier: MIT
 

.gitmodules

@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2024 IObundle
+# SPDX-FileCopyrightText: 2025 IObundle
 #
 # SPDX-License-Identifier: MIT
 

CITATION.cff.license

@@ -1,3 +1,3 @@
-SPDX-FileCopyrightText: 2024 IObundle
+SPDX-FileCopyrightText: 2025 IObundle
 
 SPDX-License-Identifier: MIT

Makefile

@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2024 IObundle
+# SPDX-FileCopyrightText: 2025 IObundle
 #
 # SPDX-License-Identifier: MIT
 
@@ -13,6 +13,8 @@ BUILD_DIR ?= $(shell nix-shell --run "py2hwsw $(CORE) print_build_dir")
 INIT_MEM ?= 1
 USE_EXTMEM ?= 0
 
+VERSION ?=$(shell cat iob_soc.py | grep version | cut -d '"' -f 4)
+
 ifneq ($(DEBUG),)
 EXTRA_ARGS +=--debug_level $(DEBUG)
 endif
@@ -21,22 +23,22 @@ setup:
 	nix-shell --run "py2hwsw $(CORE) setup --no_verilog_lint --py_params 'init_mem=$(INIT_MEM):use_extmem=$(USE_EXTMEM)' $(EXTRA_ARGS)"
 
 pc-emul-run:
-	nix-shell --run "make clean setup && make -C ../$(CORE)_V*/ pc-emul-run"
+	nix-shell --run "make clean setup && make -C ../$(CORE)_V$(VERSION)/ pc-emul-run"
 
 pc-emul-test:
-	nix-shell --run "make clean setup && make -C ../$(CORE)_V*/ pc-emul-run"
+	nix-shell --run "make clean setup && make -C ../$(CORE)_V$(VERSION)/ pc-emul-run"
 
 sim-run:
-	nix-shell --run "make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V*/ sim-run SIMULATOR=$(SIMULATOR)"
+	nix-shell --run "make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V$(VERSION)/ sim-run SIMULATOR=$(SIMULATOR)"
 
 sim-test:
-	nix-shell --run "make clean setup INIT_MEM=1 USE_EXTMEM=0 && make -C ../$(CORE)_V*/ sim-run SIMULATOR=icarus"
-	nix-shell --run "make clean setup INIT_MEM=0 USE_EXTMEM=0 && make -C ../$(CORE)_V*/ sim-run SIMULATOR=verilator"
-	nix-shell --run "make clean setup INIT_MEM=0 USE_EXTMEM=1 && make -C ../$(CORE)_V*/ sim-run SIMULATOR=verilator"
+	nix-shell --run "make clean setup INIT_MEM=1 USE_EXTMEM=0 && make -C ../$(CORE)_V$(VERSION)/ sim-run SIMULATOR=icarus"
+	nix-shell --run "make clean setup INIT_MEM=0 USE_EXTMEM=0 && make -C ../$(CORE)_V$(VERSION)/ sim-run SIMULATOR=verilator"
+	nix-shell --run "make clean setup INIT_MEM=0 USE_EXTMEM=1 && make -C ../$(CORE)_V$(VERSION)/ sim-run SIMULATOR=verilator"
 
 fpga-run:
-	nix-shell --run "make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V*/ fpga-fw-build BOARD=$(BOARD)"
-	make -C ../$(CORE)_V*/ fpga-run BOARD=$(BOARD)
+	nix-shell --run "make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V$(VERSION)/ fpga-fw-build BOARD=$(BOARD)"
+	make -C ../$(CORE)_V$(VERSION)/ fpga-run BOARD=$(BOARD)
 
 fpga-test:
 	make clean setup fpga-run BOARD=cyclonev_gt_dk INIT_MEM=1 USE_EXTMEM=0
@@ -45,13 +47,13 @@ fpga-test:
 	make clean setup fpga-run BOARD=aes_ku040_db_g INIT_MEM=0 USE_EXTMEM=1
 
 syn-build: clean
-	nix-shell --run "make setup && make -C ../$(CORE)_V*/ syn-build SYNTHESIZER=$(SYNTHESIZER)"
+	nix-shell --run "make setup && make -C ../$(CORE)_V$(VERSION)/ syn-build SYNTHESIZER=$(SYNTHESIZER)"
 
 doc-build:
-	nix-shell --run "make clean setup && make -C ../$(CORE)_V*/ doc-build"
+	nix-shell --run "make clean setup && make -C ../$(CORE)_V$(VERSION)/ doc-build"
 
 doc-test:
-	nix-shell --run "make clean setup && make -C ../$(CORE)_V*/ doc-test"
+	nix-shell --run "make clean setup && make -C ../$(CORE)_V$(VERSION)/ doc-test"
 
 
 test-all: pc-emul-test sim-test fpga-test doc-test
@@ -81,3 +83,14 @@ python-cache-clean:
 	find . -name "*__pycache__" -exec rm -rf {} \; -prune
 
 .PHONY: clean python-cache-clean
+
+# Tester
+
+tester-sim-run:
+	nix-shell --run "make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V$(VERSION)/submodules/tester/ sim-run SIMULATOR=$(SIMULATOR)"
+
+tester-fpga-run:
+	nix-shell --run "make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V$(VERSION)/submodules/tester/ fpga-fw-build BOARD=$(BOARD)"
+	make -C ../$(CORE)_V$(VERSION)/submodules/tester/ fpga-run BOARD=$(BOARD)
+
+.PHONY: tester-sim-run tester-fpga-run

README.md

@@ -1,5 +1,5 @@
 <!--
-SPDX-FileCopyrightText: 2024 IObundle
+SPDX-FileCopyrightText: 2025 IObundle
 
 SPDX-License-Identifier: MIT
 -->

assets/A-IQ_Ready_logo_blue_transp.png.license

@@ -0,0 +1,3 @@
+SPDX-FileCopyrightText: 2025 IObundle
+
+SPDX-License-Identifier: MIT

assets/Chips-JU_logo.jpeg.license

@@ -0,0 +1,3 @@
+SPDX-FileCopyrightText: 2025 IObundle
+
+SPDX-License-Identifier: MIT

default.nix

@@ -1,27 +1,30 @@
-# SPDX-FileCopyrightText: 2024 IObundle
+# SPDX-FileCopyrightText: 2025 IObundle
 #
 # SPDX-License-Identifier: MIT
 
 { pkgs ? import <nixpkgs> {} }:
 
 let
-  py2hwsw_commit = "9c36a922ee8bdaacbe14165683617c66540722f5"; # Replace with the desired commit.
-  py2hwsw_sha256 = "YpxcxYuwJxXKyEh6OPBzq08kS44jm8wotj0Icx0Dfuo="; # Replace with the actual SHA256 hash.
+  py2hwsw_commit = "8394efd39edeaa898d22248e1312f94506bbcf1b"; # Replace with the desired commit.
+  py2hwsw_sha256 = "wLj7K8vmvbEC44T2Sv42+0HnrDHNhBO/SIUU0jT2TSM="; # Replace with the actual SHA256 hash.
   # Get local py2hwsw root from `PY2HWSW_ROOT` env variable
   py2hwswRoot = builtins.getEnv "PY2HWSW_ROOT";
 
   # For debug
-  disable_py2_build = 0;
+  force_py2_build = 0;
 
   py2hwsw = 
-    if disable_py2_build == 0 then
+    # If no root is provided, or there is a root but we want to force a rebuild
+    if py2hwswRoot == "" || force_py2_build != 0 then
       pkgs.python3.pkgs.buildPythonPackage rec {
         pname = "py2hwsw";
         version = py2hwsw_commit;
         src =
           if py2hwswRoot != "" then
+            # Root provided, use local
             pkgs.lib.cleanSource py2hwswRoot
           else
+            # No root provided, use GitHub
             (pkgs.fetchFromGitHub {
               owner = "IObundle";
               repo = "py2hwsw";
@@ -42,7 +45,10 @@ let
 
 in
 
-if disable_py2_build == 0 then
+# If no root is provided, or there is a root but we want to force a rebuild
+if py2hwswRoot == "" || force_py2_build != 0 then
+  # Use newly built nix package
   import "${py2hwsw}/lib/python${builtins.substring 0 4 pkgs.python3.version}/site-packages/py2hwsw/lib/default.nix" { inherit pkgs; py2hwsw_pkg = py2hwsw; }
 else
+  # Use local
   import "${py2hwswRoot}/py2hwsw/lib/default.nix" { inherit pkgs; py2hwsw_pkg = py2hwsw; }

iob_soc.py

@@ -1,12 +1,12 @@
-# SPDX-FileCopyrightText: 2024 IObundle
+# SPDX-FileCopyrightText: 2025 IObundle
 #
 # SPDX-License-Identifier: MIT
 
 
 def setup(py_params_dict):
     # Py2hwsw dictionary describing current core
     core_dict = {
-        "version": "0.1",
+        "version": "0.8",
         "parent": {
             # IOb-SoC is a child core of iob_system: https://github.com/IObundle/py2hwsw/tree/main/py2hwsw/lib/hardware/iob_system
             # IOb-SoC will inherit all attributes/files from the iob_system core.
@@ -27,7 +27,7 @@ def setup(py_params_dict):
                     },
                     # NOTE: Add other ports here.
                 ],
-                "blocks": [
+                "subblocks": [
                     {
                         # Instantiate a UART core from: https://github.com/IObundle/py2hwsw/tree/main/py2hwsw/lib/hardware/iob_uart
                         "core_name": "iob_uart",

software/src/iob_soc_firmware.c

@@ -1,16 +1,16 @@
 /*
- * SPDX-FileCopyrightText: 2024 IObundle
+ * SPDX-FileCopyrightText: 2025 IObundle
  *
  * SPDX-License-Identifier: MIT
  */
 
 #include "iob_bsp.h"
+#include "iob_printf.h"
 #include "iob_soc_conf.h"
 #include "iob_soc_periphs.h"
 #include "iob_soc_system.h"
 #include "iob_timer.h"
 #include "iob_uart.h"
-#include "printf.h"
 #include <string.h>
 
 char *send_string = "Sending this string as a file to console.\n"
@@ -38,6 +38,8 @@ int main() {
   // test printf with floats
   printf("Value of Pi = %f\n\n", 3.1415);
 
+// Don't transfer files when running alongside tester
+#ifndef TESTER
   // test file send
   char *sendfile = malloc(1000);
   int send_file_size = 0;
@@ -60,6 +62,7 @@ int main() {
   free(recvfile);
 
   uart_sendfile("test.log", strlen(pass_string), pass_string);
+#endif // TESTER
 
   // read current timer count, compute elapsed time
   unsigned long long elapsed = timer_get_count();