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Capstone_Project

Summary of the Project: This project aims to design a flexible and cost-effective FPGA-based RISC-V prototyping platform with an "Arduino-like" approach to support Ada development in embedded systems. The platform will bridge hardware and software domains, enabling seamless integration, configuration, and expansion for various applications.

Key Features: FPGA (Artix-7), high I/O availability, HyperRAM, DDR memory, and other components. Compatibility with open-source tools (e.g., Yosys) for FPGA bitstream creation. Integration with Ada's package manager to streamline System-on-Chip (SoC) deployment. Goals: Develop an SoC prototyping board focused on Ada-based embedded development. Create an open-source infrastructure for FPGA development with Ada integration. Design and document extension boards to demonstrate the platform’s capabilities. Showcase a working example with a RISC-V SoC and Ada firmware. Benefits: Cost-effective alternative to current prototyping platforms (like Arduino). Ada/SPARK integration benefits developers of safety-critical systems. Open-source contribution to hardware development, enhancing future reuse. Hardware Design: The board features various components such as LED indicators, external memories, I/O multiplexers, a temperature sensor, and connectors. The project includes:

Schematic design, PCB layout, and FPGA programming. Firmware development in Ada to manage memory and I/O. Integration of RISC-V cores using tools like LiteX. Implementation Phases: The project will follow a SCRUM methodology, with sprints focusing on tasks like component selection, board layout, SoC deployment infrastructure, and Ada integration.

The project is funded by AdaCore and led by Chief Engineer Olivier Henley.

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  • Ada 100.0%