Rationalised MCU #defines ready to use CoreN2G

Duet3D · Jul 22, 2020 · 434c68a · 434c68a
1 parent 8a867a2
commit 434c68a
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Showing 8 changed files with 52 additions and 46 deletions.
diff --git a/src/CAN/CanInterface.cpp b/src/CAN/CanInterface.cpp
@@ -68,7 +68,7 @@ static CanMessageQueue PendingCommands;
 
 static struct can_async_descriptor CAN_0;
 
-#ifdef SAME51
+#if SAME5x
 
 /**
  * \brief CAN initialization function
@@ -86,7 +86,7 @@ void CAN_0_init(const CanTiming& timing)
 
 #endif
 
-#ifdef SAMC21
+#if SAMC21
 
 /**
  * \brief CAN initialization function
@@ -128,9 +128,9 @@ bool CanInterface::GetCanMessage(CanMessageBuffer *buf)
 void CanInterface::Init(CanAddress defaultBoardAddress, bool doHardwareReset)
 {
 	// Read the CAN timing data from the top part of the NVM User Row
-#if defined(SAME51)
+#if SAME5x
 	const uint32_t CanUserAreaDataOffset = 512 - sizeof(CanUserAreaData);
-#elif defined(SAMC21)
+#elif SAMC21
 	const uint32_t CanUserAreaDataOffset = 256 - sizeof(CanUserAreaData);
 #endif
 

diff --git a/src/Config/BoardDef.h b/src/Config/BoardDef.h
@@ -12,11 +12,11 @@ constexpr float DefaultThermistorR25 = 100000.0;
 constexpr float DefaultThermistorbeta = 4388.0;
 constexpr float DefaultThermistorC = 0.0;
 
-#ifdef SAME51
+#if SAME5x
 # include "SAME51config.h"
 #endif
 
-#ifdef SAMC21
+#if SAMC21
 # include "SAMC21config.h"
 #endif
 

diff --git a/src/Hardware/Flash.cpp b/src/Hardware/Flash.cpp
@@ -24,9 +24,9 @@ bool Flash::Unlock(uint32_t start, uint32_t length)
 {
 	// The flash_unlock command only works if the number of pages passed is exactly 1 lock region. So we need to loop calling it.
 	const uint32_t pageSize = flash_get_page_size(&flash);
-#ifdef SAMC21
+#if SAMC21
 	constexpr uint32_t NVMCTRL_REGIONS_NUM = 16;						// from hpl_nvmctrl.c
-#else
+#elif SAME5x
 	constexpr uint32_t NVMCTRL_REGIONS_NUM = 32;						// from hpl_nvmctrl.c
 #endif
 	const uint32_t pagesPerRegion = FLASH_SIZE / (NVMCTRL_REGIONS_NUM * pageSize);
@@ -55,9 +55,9 @@ bool Flash::Lock(uint32_t start, uint32_t length)
 {
 	// The flash_lock command only works if the number of pages passed is exactly 1 lock region. So we need to loop calling it.
 	const uint32_t pageSize = flash_get_page_size(&flash);
-#ifdef SAMC21
+#if SAMC21
 	constexpr uint32_t NVMCTRL_REGIONS_NUM = 16;						// from hpl_nvmctrl.c
-#else
+#elif SAME5x
 	constexpr uint32_t NVMCTRL_REGIONS_NUM = 32;						// from hpl_nvmctrl.c
 #endif
 	const uint32_t pagesPerRegion = FLASH_SIZE / (NVMCTRL_REGIONS_NUM * pageSize);

diff --git a/src/Hardware/Peripherals.h b/src/Hardware/Peripherals.h
@@ -15,9 +15,13 @@ extern "C" uint32_t SystemCoreClock;			// in system_samxxx.c
 extern "C" uint32_t SystemPeripheralClock;		// in system_samxxx.c
 
 #if defined(__SAME51N19A__)
-# define SAME51		1
+# define SAME5x		1
+# define SAMC21		0
 #elif defined(__SAMC21G18A__)
+# define SAME5x		0
 # define SAMC21		1
+#else
+# error Unsupported processor
 #endif
 
 // Timer identifiers used in assigning PWM control devices
@@ -29,7 +33,7 @@ enum class TcOutput : uint8_t
 	tc2_0, tc2_1,
 	tc3_0, tc3_1,
 	tc4_0, tc4_1,
-#ifdef SAME51
+#if SAME5x
 	tc5_0, tc5_1,
 	tc6_0, tc6_1,
 	tc7_0, tc7_1,
@@ -43,7 +47,7 @@ static inline constexpr unsigned int GetOutputNumber(TcOutput tc) { return (uint
 
 enum class TccOutput : uint8_t
 {
-#ifdef SAME51
+#if SAME5x
 	// TCC devices on peripheral F
 	tcc0_0F = 0x00, tcc0_1F, tcc0_2F, tcc0_3F, tcc0_4F, tcc0_5F,
 	tcc1_0F = 0x08, tcc1_1F, tcc1_2F, tcc1_3F, tcc1_4F, tcc1_5F,
@@ -61,7 +65,7 @@ enum class TccOutput : uint8_t
 	tcc5_0G = 0xA8, tcc5_1G, tcc5_2G, tcc5_3G, tcc5_4G, tcc5_5G,
 #endif
 
-#ifdef SAMC21
+#if SAMC21
 	// TCC devices on peripheral E
 	tcc0_0E = 0x00, tcc0_1E, tcc0_2E, tcc0_3E, tcc0_4E, tcc0_5E,
 	tcc1_0E = 0x08, tcc1_1E, tcc1_2E, tcc1_3E, tcc1_4E, tcc1_5E,
@@ -79,9 +83,9 @@ static inline constexpr unsigned int GetOutputNumber(TccOutput tcc) { return (ui
 
 static inline constexpr unsigned int GetPeriNumber(TccOutput tcc)
 {
-#if defined(SAME51)
+#if SAME5x
 	return ((uint8_t)tcc >= 0x80) ? GPIO_PIN_FUNCTION_G : GPIO_PIN_FUNCTION_F;		// peripheral G or F
-#elif defined(SAMC21)
+#elif SAMC21
 	return ((uint8_t)tcc >= 0x80) ? GPIO_PIN_FUNCTION_F : GPIO_PIN_FUNCTION_E;		// peripheral F or E
 #else
 # error Unsupported processor
@@ -106,14 +110,14 @@ enum class SercomIo : uint8_t
 	// SERCOM pins on peripheral C
 	sercom0c = 0x00,
 	sercom1c, sercom2c, sercom3c, sercom4c, sercom5c,
-#ifdef SAME51
+#if SAME5x
 	sercom6c, sercom7c,
 #endif
 
 	// SERCOM pins on peripheral D
 	sercom0d = 0x80,
 	sercom1d, sercom2d, sercom3d, sercom4d, sercom5d,
-#ifdef SAME51
+#if SAME5x
 	sercom6d, sercom7d,
 #endif
 

diff --git a/src/Hardware/Serial.cpp b/src/Hardware/Serial.cpp
@@ -12,9 +12,9 @@
 #include <hal_gpio.h>
 #include <atmel_start_pins.h>
 
-#if defined(SAME51)
+#if SAME5x
 # include <hri_sercom_e51.h>
-#elif defined(SAMC21)
+#elif SAMC21
 # include <hri_sercom_c21.h>
 #else
 # error Unsupported processor
@@ -30,22 +30,22 @@ constexpr uint32_t DiagBaudRate = 57600;		// the baud rate we use, default for P
 void Serial::Init()
 {
 
-#if defined(SAME51) && DIAG_SERCOM_NUMBER == 3
+#if SAME5x && DIAG_SERCOM_NUMBER == 3
 # define DIAG_SERCOM		SERCOM3
 	hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, GCLK_PCHCTRL_GEN_GCLK1 | (1 << GCLK_PCHCTRL_CHEN_Pos));
 	hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, GCLK_PCHCTRL_GEN_GCLK3 | (1 << GCLK_PCHCTRL_CHEN_Pos));
 	hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
 	gpio_set_pin_function(PortBPin(20), PINMUX_PB20C_SERCOM3_PAD0);					// TxD
 	gpio_set_pin_function(PortBPin(21), PINMUX_PB21C_SERCOM3_PAD1);					// RxD
 
-#elif defined(SAMC21) && DIAG_SERCOM_NUMBER == 4
+#elif SAMC21 && DIAG_SERCOM_NUMBER == 4
 # define DIAG_SERCOM		SERCOM4
 	hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, GCLK_PCHCTRL_GEN_GCLK0 | (1 << GCLK_PCHCTRL_CHEN_Pos));
 	hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, GCLK_PCHCTRL_GEN_GCLK3 | (1 << GCLK_PCHCTRL_CHEN_Pos));
 	hri_mclk_set_APBCMASK_SERCOM4_bit(MCLK);
 	gpio_set_pin_function(PortAPin(12), PINMUX_PA12D_SERCOM4_PAD0);					// TxD
 	gpio_set_pin_function(PortAPin(14), PINMUX_PA13D_SERCOM4_PAD1);					// RxD
-#elif defined(SAMC21) && DIAG_SERCOM_NUMBER == 5
+#elif SAMC21 && DIAG_SERCOM_NUMBER == 5
 # define DIAG_SERCOM		SERCOM5
 	hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_CORE, GCLK_PCHCTRL_GEN_GCLK0 | (1 << GCLK_PCHCTRL_CHEN_Pos));
 	hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_SLOW, GCLK_PCHCTRL_GEN_GCLK3 | (1 << GCLK_PCHCTRL_CHEN_Pos));
@@ -66,7 +66,7 @@ void Serial::Init()
 						 | (3u << SERCOM_USART_CTRLA_RXPO_Pos)				// receive data on pad 3
 						 | (0u << SERCOM_USART_CTRLA_TXPO_Pos)				// transmit on pad 0
 						 | (0u << SERCOM_USART_CTRLA_SAMPR_Pos)				// 16x over sampling, normal baud rate generation
-#ifdef SAME51
+#if SAME5x
 						 | (0u << SERCOM_USART_CTRLA_RXINV_Pos)				// don't invert receive data
 						 | (0u << SERCOM_USART_CTRLA_TXINV_Pos)				// don't invert transmitted data
 #endif

diff --git a/src/Hardware/SimpleAnalogIn_SAMC21.cpp b/src/Hardware/SimpleAnalogIn_SAMC21.cpp
@@ -7,7 +7,7 @@
 
 #include "Peripherals.h"
 
-#ifdef SAMC21
+#if SAMC21
 
 #include "SimpleAnalogIn.h"
 

diff --git a/src/Main.cpp b/src/Main.cpp
@@ -17,14 +17,14 @@
 #include <CanId.h>
 #include <CanMessageBuffer.h>
 
-#if defined(SAME51)
+#if SAME5x
 
 constexpr uint32_t FlashBlockSize = 0x00010000;							// the block size we assume for flash
 constexpr uint32_t BlockReceiveTimeout = 2000;							// block receive timeout milliseconds
 const uint32_t FirmwareFlashStart = FLASH_ADDR + FlashBlockSize;		// we reserve 64K for the bootloader
 constexpr const char* BoardTypeName = "EXP3HC";
 
-#elif defined(SAMC21)
+#elif SAMC21
 
 constexpr uint32_t FlashBlockSize = 0x00004000;							// the block size we assume for flash
 constexpr uint32_t BlockReceiveTimeout = 2000;							// block receive timeout milliseconds
@@ -155,7 +155,7 @@ enum class ErrorCode : unsigned int
 	lockFailed = 13
 };
 
-#if defined(SAMC21) && !defined(SAMMYC21)
+#if SAMC21 && !defined(SAMMYC21)
 
 unsigned int boardTypeIndex;
 
@@ -185,7 +185,7 @@ inline bool GetLedActiveHigh()
 
 static uint8_t blockBuffer[FlashBlockSize];
 
-#ifdef SAME51
+#if SAME5x
 uint8_t ReadBoardAddress();
 #endif
 
@@ -270,7 +270,7 @@ void RequestFirmwareBlock(uint32_t fileOffset, uint32_t numBytes)
 		ReportErrorAndRestart("No buffers", ErrorCode::noBuffer);
 	}
 	CanMessageFirmwareUpdateRequest * const msg = buf->SetupRequestMessage<CanMessageFirmwareUpdateRequest>(0, CanInterface::GetCanAddress(), CanId::MasterAddress);
-#if defined(SAMMYC21) || defined(SAME51)
+#if defined(SAMMYC21) || SAME5x
 	SafeStrncpy(msg->boardType, BoardTypeName, sizeof(msg->boardType));
 	msg->boardVersion = 0;
 #else
@@ -372,9 +372,9 @@ extern "C" int main()
 	atmel_start_init();
 	SystemCoreClock = CONF_CPU_FREQUENCY;
 
-#if defined(SAME51)
+#if SAME5x
 	SystemPeripheralClock = CONF_CPU_FREQUENCY/2;
-#elif defined(SAMC21)
+#elif SAMC21
 	SystemPeripheralClock = CONF_CPU_FREQUENCY;
 #endif
 
@@ -383,14 +383,14 @@ extern "C" int main()
 	SysTick->CTRL = (1 << SysTick_CTRL_ENABLE_Pos) | (1 << SysTick_CTRL_TICKINT_Pos) | (1 << SysTick_CTRL_CLKSOURCE_Pos);
 	Serial::Init();
 
-#if defined(SAME51)
+#if SAME5x
 
 	for (Pin p : BoardAddressPins)
 	{
 		SetPinMode(p, INPUT_PULLUP);
 	}
 
-#elif defined(SAMC21)
+#elif SAMC21
 
 	// Establish the board type and initialise pins
 
@@ -443,14 +443,14 @@ extern "C" int main()
 		SetPinMode(GetLedPin(ledNumber), (GetLedActiveHigh()) ? OUTPUT_LOW : OUTPUT_HIGH);
 	}
 
-#if defined(SAME51)
+#if SAME5x
 
 	// Check whether address switches are set to zero. If so then reset and load new firmware
 	const CanAddress switches = ReadBoardAddress();
 	const bool doHardwareReset = (switches == 0);
 	const CanAddress defaultAddress = (doHardwareReset) ? CanId::ExpansionBoardFirmwareUpdateAddress : switches;
 
-#elif defined(SAMC21)
+#elif SAMC21
 
 # ifdef SAMMYC21
 	const CanAddress defaultAddress = CanId::SammyC21DefaultAddress;
@@ -573,7 +573,7 @@ extern "C" int main()
 	StartFirmware();
 }
 
-#ifdef SAME51
+#if SAME5x
 
 // Read the board address
 uint8_t ReadBoardAddress()
@@ -612,16 +612,16 @@ bool CheckValidFirmware()
 	const uint32_t storedCRC = *crcAddr;
 
 	// Compute the CRC-32 of the file
-#if defined(SAME51)
+#if SAME5x
 	DMAC->CRCCTRL.reg = DMAC_CRCCTRL_CRCBEATSIZE_WORD | DMAC_CRCCTRL_CRCSRC_DISABLE | DMAC_CRCCTRL_CRCPOLY_CRC32;	// disable the CRC unit
-#elif defined(SAMC21)
+#elif SAMC21
 	DMAC->CTRL.bit.CRCENABLE = 0;
 #else
 # error Unsupported processor
 #endif
 	DMAC->CRCCHKSUM.reg = 0xFFFFFFFF;
 	DMAC->CRCCTRL.reg = DMAC_CRCCTRL_CRCBEATSIZE_WORD | DMAC_CRCCTRL_CRCSRC_IO | DMAC_CRCCTRL_CRCPOLY_CRC32;
-#if defined(SAMC21)
+#if SAMC21
 	DMAC->CTRL.bit.CRCENABLE = 1;
 #endif
 	for (const uint32_t *p = reinterpret_cast<const uint32_t*>(FirmwareFlashStart); p < crcAddr; ++p)
@@ -656,7 +656,7 @@ bool CheckValidFirmware()
 	SysTick->CTRL = (1 << SysTick_CTRL_CLKSOURCE_Pos);	// disable the system tick exception
 	__disable_irq();
 
-#if defined(SAME51)
+#if SAME5x
 
 	for (size_t i = 0; i < 8; i++)
 	{
@@ -674,7 +674,7 @@ bool CheckValidFirmware()
 	OSCCTRL->Dpll[1].DPLLCTRLA.bit.ENABLE = 0;
 	while (OSCCTRL->Dpll[1].DPLLSYNCBUSY.bit.ENABLE) { }
 
-#elif defined(SAMC21)
+#elif SAMC21
 
 	NVIC->ICER[0] = 0xFFFFFFFF;							// Disable IRQs
 	NVIC->ICPR[0] = 0xFFFFFFFF;							// Clear pending IRQs
@@ -724,9 +724,9 @@ bool CheckValidFirmware()
 	__enable_irq();
 
 	__asm volatile ("ldr r1, [r3, #4]");
-#if defined(SAME51)
+#if SAME5x
 	__asm volatile ("orr r1, r1, #1");
-#elif defined(SAMC21)
+#elif SAMC21
 	__asm volatile ("movs r2, #1");
 	__asm volatile ("orr r1, r1, r2");
 #else

diff --git a/src/RepRapFirmware.h b/src/RepRapFirmware.h
@@ -33,12 +33,14 @@ extern "C" void debugPrintf(const char* fmt, ...) __attribute__ ((format (printf
 //#define DEBUG_HERE do { debugPrintf("At " __FILE__ " line %d\n", __LINE__); delay(50); } while (false)
 
 #if defined(__SAME51N19A__)
-# define SAME51		1
+# define SAME5x		1
+# define SAMC21		0
 #elif defined(__SAMC21G18A__)
+# define SAME5x		0
 # define SAMC21		1
 #endif
 
-#ifdef SAME51
+#if SAME5x
 
 // Functions to change the base priority, to shut out interrupts up to a priority level