libtwl drivers: bracket all defines

DS-Homebrew · May 16, 2024 · 737c48e · 737c48e
1 parent bbd9b88
commit 737c48e
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Showing 5 changed files with 18 additions and 18 deletions.
diff --git a/source/ace3ds_sd/source/ioa3p.h b/source/ace3ds_sd/source/ioa3p.h
@@ -17,10 +17,10 @@
 
 // Ace3DS+ defines
 // Ace3DS+ MCCNT1 flags
-#define IOA3P_CTRL_BASE     MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0)
-#define IOA3P_CTRL_READ_4B  IOA3P_CTRL_BASE | MCCNT1_LEN_4
-#define IOA3P_CTRL_READ_512B  IOA3P_CTRL_BASE | MCCNT1_LEN_512
-#define IOA3P_CTRL_WRITE_512B IOA3P_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LEN_512
+#define IOA3P_CTRL_BASE       (MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0))
+#define IOA3P_CTRL_READ_4B    (IOA3P_CTRL_BASE | MCCNT1_LEN_4)
+#define IOA3P_CTRL_READ_512B  (IOA3P_CTRL_BASE | MCCNT1_LEN_512)
+#define IOA3P_CTRL_WRITE_512B (IOA3P_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LEN_512)
 
 // Ace3DS+ MCCMDs
 #define IOA3P_CMD_SD_READ_DATA      (0xBAull << 56)

diff --git a/source/g003/source/iom0.h b/source/g003/source/iom0.h
@@ -17,10 +17,10 @@
 
 // GMP-Z003 defines
 // GMP-Z003 MCCNT1 flags
-#define IOM0_CTRL_BASE     MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0)
-#define IOM0_CTRL_READ_4B  IOM0_CTRL_BASE | MCCNT1_LEN_4
-#define IOM0_CTRL_READ_512B  IOM0_CTRL_BASE | MCCNT1_LEN_512
-#define IOM0_CTRL_WRITE_512B IOM0_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LEN_512
+#define IOM0_CTRL_BASE       (MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0))
+#define IOM0_CTRL_READ_4B    (IOM0_CTRL_BASE | MCCNT1_LEN_4)
+#define IOM0_CTRL_READ_512B  (IOM0_CTRL_BASE | MCCNT1_LEN_512)
+#define IOM0_CTRL_WRITE_512B (IOM0_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LEN_512)
 
 // GMP-Z003 MCCMDs
 #define IOM0_CMD_CARD_INFO         (0xB0ull << 56)

diff --git a/source/m3ds/source/iom3.h b/source/m3ds/source/iom3.h
@@ -18,11 +18,11 @@
 
 // M3 defines
 // M3 MCCNT1 flags
-#define IOM3_CTRL_BASE                MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE
-#define IOM3_CTRL_GENERAL             IOM3_CTRL_BASE | MCCNT1_LATENCY2(24) | MCCNT1_LEN_4 | MCCNT1_LATENCY1(0)
-#define IOM3_CTRL_SD_READ             IOM3_CTRL_BASE | MCCNT1_LATENCY2(24) | MCCNT1_LEN_512 | MCCNT1_LATENCY1(0)
-#define IOM3_CTRL_SD_WRITE            IOM3_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LATENCY2(24) | MCCNT1_LEN_512 | MCCNT1_LATENCY1(256)
-#define IOM3_CTRL_SD_MULTI_SECTOR_END IOM3_CTRL_BASE | MCCNT1_LATENCY2(8) | MCCNT1_LEN_0 | MCCNT1_LATENCY1(256)
+#define IOM3_CTRL_BASE                (MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE)
+#define IOM3_CTRL_GENERAL             (IOM3_CTRL_BASE | MCCNT1_LATENCY2(24) | MCCNT1_LEN_4 | MCCNT1_LATENCY1(0))
+#define IOM3_CTRL_SD_READ             (IOM3_CTRL_BASE | MCCNT1_LATENCY2(24) | MCCNT1_LEN_512 | MCCNT1_LATENCY1(0))
+#define IOM3_CTRL_SD_WRITE            (IOM3_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LATENCY2(24) | MCCNT1_LEN_512 | MCCNT1_LATENCY1(256))
+#define IOM3_CTRL_SD_MULTI_SECTOR_END (IOM3_CTRL_BASE | MCCNT1_LATENCY2(8) | MCCNT1_LEN_0 | MCCNT1_LATENCY1(256))
 
 // M3 MCCMDs
 #define IOM3_CMD_CARD_INFO                  (0xB0ull << 56)

diff --git a/source/r4tfv3/source/ior4.h b/source/r4tfv3/source/ior4.h
@@ -18,10 +18,10 @@
 
 // R4 defines
 // R4 MCCNT1 flags
-#define IOR4_CTRL_BASE       MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0)
-#define IOR4_CTRL_READ_4B    IOR4_CTRL_BASE | MCCNT1_LEN_4
-#define IOR4_CTRL_READ_512B  IOR4_CTRL_BASE | MCCNT1_LEN_512
-#define IOR4_CTRL_WRITE_512B IOR4_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LEN_512
+#define IOR4_CTRL_BASE       (MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0))
+#define IOR4_CTRL_READ_4B    (IOR4_CTRL_BASE | MCCNT1_LEN_4)
+#define IOR4_CTRL_READ_512B  (IOR4_CTRL_BASE | MCCNT1_LEN_512)
+#define IOR4_CTRL_WRITE_512B (IOR4_CTRL_BASE | MCCNT1_DIR_WRITE | MCCNT1_LEN_512)
 
 // R4 MCCMDs
 #define IOR4_CMD_CARD_INFO         (0xB0ull << 56)

diff --git a/source/rpg_sd/source/iorpg.h b/source/rpg_sd/source/iorpg.h
@@ -23,7 +23,7 @@
 #define IORPG_CTRL_READ_512B (IORPG_CTRL_POLL | MCCNT1_LEN_512)
 // by default all commands are using 4KB in the original driver; can this be changed?
 #define IORPG_CTRL_READ_4KB  (IORPG_CTRL_POLL | MCCNT1_LEN_4096)
-#define IORPG_CTRL_READ_16KB  (IORPG_CTRL_POLL | MCCNT1_LEN_16384)
+#define IORPG_CTRL_READ_16KB (IORPG_CTRL_POLL | MCCNT1_LEN_16384)
 
 // ret & 0x0F != provided state
 // Note, on non-AKRPG carts, the state is in the upper 4 bits, so check 0xF0 instead