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Add support for XMC XM25QH128C/XM25QH256C/XM25QU256C/XM25QH512C/XM25QU512C #19

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Add support for XMC XM25QH128C/XM25QH256C/XM25QU256C/XM25QH512C/XM25QU512C #19

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Add support for XMC XM25QH128C/XM25QH256C/XM25QU256C/XM25QH512C/XM25Q…
Ssunk Jul 19, 2023
9cc818d
Merge branch 'AspeedTech-BMC:aspeed-master-v2019.04' into aspeed-mast…
Ssunk Jul 19, 2023
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1 change: 1 addition & 0 deletions configs/evb-ast2600-spl_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -114,6 +114,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_PHY_BROADCOM=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_NCSI=y
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12 changes: 9 additions & 3 deletions drivers/mtd/spi/spi-nor-core.c
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Expand Up @@ -259,7 +259,7 @@ static int read_fsr(struct spi_nor *nor)
* location. Return the configuration register value.
* Returns negative if error occurred.
*/
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC)
static int read_cr(struct spi_nor *nor)
{
int ret;
Expand Down Expand Up @@ -1529,7 +1529,7 @@ static int macronix_quad_enable(struct spi_nor *nor)
}
#endif

#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC)
/*
* Write status Register and configuration register with 2 bytes
* The first byte will be written to the status register, while the
Expand Down Expand Up @@ -2532,8 +2532,14 @@ static int spi_nor_init_params(struct spi_nor *nor,
}

/* need to disable hold/reset pin feature */
if (JEDEC_MFR(info) == SNOR_MFR_ST)
#ifdef CONFIG_SPI_FLASH_STMICRO
if ((JEDEC_MFR(info) == SNOR_MFR_ST))
params->quad_enable = micron_read_cr_quad_enable;
#endif

#ifdef CONFIG_SPI_FLASH_XMC
params->quad_enable = winbond_sr2_bit1_quad_enable;
#endif

if (JEDEC_MFR(info) == SNOR_MFR_GIGADEVICE)
params->quad_enable = winbond_sr2_bit1_quad_enable;
Expand Down
7 changes: 6 additions & 1 deletion drivers/mtd/spi/spi-nor-ids.c
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Expand Up @@ -369,8 +369,13 @@ const struct flash_info spi_nor_ids[] = {
#endif
#ifdef CONFIG_SPI_FLASH_XMC
/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) },
{ INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) },
{ INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) },
{ INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) },
#endif
{ },
};