Reading ADC on STM32H750B-DK. #76493
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Hello, I am using STM32H750B-DK board to read ADC. The readings seems to be stuck at an offset of about 1.5V. If I ground the ADC input, the voltage is 1.4V. It does respond to voltages above 1.5V. I checked on all 6 channels on the board as well as one other DK board with same result. The code I used is the sample code from https://github.com/zephyrproject-rtos/zephyr/tree/main/samples/drivers/adc/adc_dt The overlay I used for the board is
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Replies: 9 comments
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Hi @adtvtk! We appreciate you submitting your first issue for our open-source project. 🌟 Even though I'm a bot, I can assure you that the whole community is genuinely grateful for your time and effort. 🤖💙 |
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hello @adtvtk , I did some tests on the same card and indeed, there is this offset problem. Regarding the differential mode, it is not currently supported by the ADC driver, so it is normal that you find this 0x00 value in ADC_DIFSEL register. You can check this by setting up this configuration. First, you have to activate the differential mode by adding the value: "zephyr,differential" in the overlay file You should also know that the differential mode only works on negative channels as specified on this link. here is an example of the overlay file on ADC1 for testing if you wish :
Also enable logging in console with CONFIG_LOG=y |
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Thank you for your response. I tried implementing ADC in CubeIDE. ADC needs to be calibrated. After running calibration , the results were much better. |
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Thanks for your feedback, it's clear. In this case I also think that the problem is at the calibration level, I'll look at that too. |
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Any help on calibration will be appreciated. Also adc_dt_spec or adc_channel_cfg does not have option to set offset for the ADC. In CubeIDE, had to set these to get correct results. |
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I think there is a way to modify the offset using the "vref-mv" property, but there are some precautions to take. The "adc_dt_spec" structure is made up of a "vref_mv" variable and an "adc_channel_cfg" structure as specified in this link: https://docs.zephyrproject.org/apidoc/latest/structadc__dt__spec.html#details Based on this observation, I did a test on a stm32 nucleo board (nucleo_f401re) which also had this calibration problem on its channel 0. I set up this overlay file :
With this config I was able to go from almost 1000 mV to 24 mV offset with vref-mv = <100>; . When I put the pin corresponding to the channel to ground, the offset went to 0 mV too. Then I did it again on the stm32h750b_dk board , and I was able to lower the offset. you can put a vref_mv value lower than 3300 mv (eg: 1500) for a start. Warning ❗: it is important for this board not to set this value to 0 or lower it too much for fear of having overcurrent problems and thus damaging the board. (maybe decrease it step by step) hoping this can help you and save you further trouble |
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I checked adding vref-mv to the overlay. But I think it's changing vref value taken for mV calculation. The Raw value ADC is unchanged. Also when checked with voltage input, the max value of input is then whatever is set to vref-mv. adc_ref_internal() function returns value of vref-mv. If I dont set it overlay, it displays 33oomv which is vref for the board. Compared all the registers in Zephyr and CubeIDE. ADC_CALFACT readings in Zephyr and CubeIDE are close. 0x400 Vs 0x3F1. |
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Hello @adtvtk, |
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Thank you for your feedback. It works with above setting |
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Hello @adtvtk,
You seem to have a clock configuration problem, I tried to put
st,adc-prescaler = <4>;
and it works on my board. I didn't push the analysis, but it seems the ADC kernel clock was too fast.If you like, you can try to further reduce the frequency by defining an asynchronous clock for the ADC (by using
st,adc-clock-source = <ASYNC>;
and adding a secondary clock inclocks
; there are examples of this sort of thing in the board dts)