versal-virtio-mmio.dtsi

/*
 * Versal VIRTIO
 *
 * Copyright (c) 2018, Xilinx Inc
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of the <organization> nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "versal.dtsh"

#define GEN_VIRTIO_MMIO(n, addrh, addrl, irq)			\
	virtio_mmio_ ## n {					\
		compatible = "virtio-mmio";			\
		reg = < addrh addrl 0x0 MM_TOP_VIRTIO_MMIO_SIZE 0x0 >;		\
		interrupts = < irq >;				\
	}

&amba_lpd {
	GEN_VIRTIO_MMIO(0, 0x0, MM_TOP_VIRTIO_MMIO_0, RESERVED_6_IRQ_0);
	GEN_VIRTIO_MMIO(1, 0x0, MM_TOP_VIRTIO_MMIO_1, RESERVED_6_IRQ_1);
	GEN_VIRTIO_MMIO(2, 0x0, MM_TOP_VIRTIO_MMIO_2, RESERVED_6_IRQ_2);
	GEN_VIRTIO_MMIO(3, 0x0, MM_TOP_VIRTIO_MMIO_3, RESERVED_6_IRQ_3);
	GEN_VIRTIO_MMIO(4, 0x0, MM_TOP_VIRTIO_MMIO_4, RESERVED_6_IRQ_4);
	GEN_VIRTIO_MMIO(5, 0x0, MM_TOP_VIRTIO_MMIO_5, RESERVED_6_IRQ_5);
	GEN_VIRTIO_MMIO(6, 0x0, MM_TOP_VIRTIO_MMIO_6, RESERVED_6_IRQ_6);
	GEN_VIRTIO_MMIO(7, 0x0, MM_TOP_VIRTIO_MMIO_7, RESERVED_6_IRQ_7);
};

/ {
	/* QEMUs  VirtIO does not support IOMMUs nor selectable ASs.  */
	amba_alias: amba_alias@0 {
		compatible = "qemu:memory-region";
		container = <&qemu_sysmem>;
		alias = <&amba>;
		reg = <0x0 0x0 0xFFFFFFFF 0xFFFFFFFF 0x1>;
	};

	/* Magic node representing QEMU's default address-space.  */
	qemu_sysmem: qemu_sysmem@0 {
		#address-cells = <2>;
		#size-cells = <2>;
		#priority-cells = <1>;
		compatible = "qemu:system-memory";
	};
};