diff --git a/coreboot b/coreboot
index 7c024f86..f51dcabe 160000
--- a/coreboot
+++ b/coreboot
@@ -1 +1 @@
-Subproject commit 7c024f864c94cb959b6d1381d0aed32bdd846c20
+Subproject commit f51dcabecd637825906349566e762af47fb18898
diff --git a/edk2 b/edk2
index 88f5720e..85f3fc66 160000
--- a/edk2
+++ b/edk2
@@ -1 +1 @@
-Subproject commit 88f5720e163089a8ed8831080d4ab9eeebf42ea2
+Subproject commit 85f3fc66546d7fbf709c24437208e299fbc8d869
diff --git a/models/README.md b/models/README.md
index 6509798b..f8bae8d7 100644
--- a/models/README.md
+++ b/models/README.md
@@ -36,7 +36,9 @@
 - [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
 - [lemp12](./lemp12) - System76 Lemur Pro (lemp12)
 - [lemp13](./lemp13) - System76 Lemur Pro (lemp13)
+- [lemp13-b](./lemp13-b) - System76 Lemur Pro (lemp13-b)
 - [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
+- [meer9](./meer9) - System76 Meerkat (meer9)
 - [oryp10](./oryp10) - System76 Oryx Pro (oryp10)
 - [oryp11](./oryp11) - System76 Oryx Pro (oryp11)
 - [oryp12](./oryp12) - System76 Oryx Pro (oryp12)
diff --git a/models/meer9/IntelGopDriver.efi b/models/meer9/IntelGopDriver.efi
new file mode 100644
index 00000000..55835120
--- /dev/null
+++ b/models/meer9/IntelGopDriver.efi
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:f24151f629200a6207db3476016eb47df42366d591eed2fdd499f63c9d512975
+size 134656
diff --git a/models/meer9/IntelGopDriver.inf b/models/meer9/IntelGopDriver.inf
new file mode 100644
index 00000000..39b2eb91
--- /dev/null
+++ b/models/meer9/IntelGopDriver.inf
@@ -0,0 +1,9 @@
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = IntelGopDriver
+  FILE_GUID                      = 767222f4-a9f4-41ba-9faa-edaa1405a486
+  MODULE_TYPE                    = UEFI_DRIVER
+  VERSION_STRING                 = 1.0
+
+[Binaries.X64]
+  PE32|IntelGopDriver.efi|*
diff --git a/models/meer9/MeteorLakeFspBinPkg b/models/meer9/MeteorLakeFspBinPkg
new file mode 120000
index 00000000..1eef7228
--- /dev/null
+++ b/models/meer9/MeteorLakeFspBinPkg
@@ -0,0 +1 @@
+../../fsp/mtl/4122.12/MeteorLakeFspBinPkg
\ No newline at end of file
diff --git a/models/meer9/README.md b/models/meer9/README.md
new file mode 100644
index 00000000..6a737f8e
--- /dev/null
+++ b/models/meer9/README.md
@@ -0,0 +1,12 @@
+# System76 Meerkat (meer9)
+
+## Contents
+
+- [EC](./ec.rom)
+  - *Read Error: No such file or directory (os error 2)*
+- [FD](./fd.rom)
+  - Size: 16 KB
+  - HAP: true
+- [ME](./me.rom)
+  - Size: 10160 KB
+  - Version: 18.0.5.2028
diff --git a/models/meer9/README.md.in b/models/meer9/README.md.in
new file mode 100644
index 00000000..a6db818e
--- /dev/null
+++ b/models/meer9/README.md.in
@@ -0,0 +1 @@
+# System76 Meerkat (meer9)
diff --git a/models/meer9/chip.txt b/models/meer9/chip.txt
new file mode 100644
index 00000000..9eb151f6
--- /dev/null
+++ b/models/meer9/chip.txt
@@ -0,0 +1 @@
+W25Q256JW
diff --git a/models/meer9/coreboot-collector.txt b/models/meer9/coreboot-collector.txt
new file mode 100644
index 00000000..16e0cedc
--- /dev/null
+++ b/models/meer9/coreboot-collector.txt
@@ -0,0 +1,257 @@
+## PCI ##
+PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x7D01, Revision 0x04
+PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x7DD5, Revision 0x08
+PCI Device: 0000:00:06.0: Class 0x00060400, Vendor 0x8086, Device 0x7E4D, Revision 0x20
+PCI Device: 0000:00:06.2: Class 0x00060400, Vendor 0x8086, Device 0x7ECB, Revision 0x10
+PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x7EC4, Revision 0x10
+PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x7E4C, Revision 0x20
+PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x7D0D, Revision 0x01
+PCI Device: 0000:00:0b.0: Class 0x00120000, Vendor 0x8086, Device 0x7D1D, Revision 0x04
+PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x7EC0, Revision 0x10
+PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x7EC2, Revision 0x10
+PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7E7D, Revision 0x20
+PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7E7F, Revision 0x20
+PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7E40, Revision 0x20
+PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7E78, Revision 0x20
+PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7E70, Revision 0x20
+PCI Device: 0000:00:16.3: Class 0x00070002, Vendor 0x8086, Device 0x7E73, Revision 0x20
+PCI Device: 0000:00:17.0: Class 0x00010601, Vendor 0x8086, Device 0x7E63, Revision 0x20
+PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7E3C, Revision 0x20
+PCI Device: 0000:00:1c.5: Class 0x00060400, Vendor 0x8086, Device 0x7E3D, Revision 0x20
+PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7E02, Revision 0x20
+PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x7E28, Revision 0x20
+PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7E22, Revision 0x20
+PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7E23, Revision 0x20
+PCI Device: 0000:02:00.0: Class 0x00010802, Vendor 0x15B7, Device 0x5002, Revision 0x00
+PCI Device: 0000:73:00.0: Class 0x00020000, Vendor 0x8086, Device 0x125B, Revision 0x04
+PCI Device: 0000:74:00.0: Class 0x00020000, Vendor 0x8086, Device 0x125C, Revision 0x04
+## GPIO ##
+MTL-H/U PCH
+GPP_V0 (0xD1,0x00) 0x40000700 0x0003c000 0x00000000 0x00000000
+GPP_V1 (0xD1,0x02) 0x40000700 0x0003c000 0x00000000 0x00000000
+GPP_V2 (0xD1,0x04) 0x40000702 0x0003c000 0x00000000 0x00000000
+GPP_V3 (0xD1,0x06) 0x40000700 0x0003c000 0x00000000 0x00000000
+GPP_V4 (0xD1,0x08) 0x40000702 0x0003c000 0x00000000 0x00000000
+GPP_V5 (0xD1,0x0A) 0x84000702 0x0003f018 0x00000000 0x00000000
+GPP_V6 (0xD1,0x0C) 0x84000702 0x0003fc19 0x00000000 0x00000000
+GPP_V7 (0xD1,0x0E) 0x84000700 0x0003fc1a 0x00000000 0x00000000
+GPP_V8 (0xD1,0x10) 0x84000702 0x0003f01b 0x00000000 0x00000000
+GPP_V9 (0xD1,0x12) 0x84000600 0x0003c01c 0x00000000 0x00000000
+GPP_V10 (0xD1,0x14) 0x84000600 0x0003c01d 0x00000000 0x00000000
+GPP_V11 (0xD1,0x16) 0x84000100 0x0003c01e 0x00000000 0x00000000
+GPP_V12 (0xD1,0x18) 0x44000300 0x0000001f 0x00000000 0x00000000
+GPP_V13 (0xD1,0x1A) 0x84000600 0x0003c020 0x00000000 0x00000000
+GPP_V14 (0xD1,0x1C) 0x84000100 0x0003c021 0x00000000 0x00000000
+GPP_V15 (0xD1,0x1E) 0x84000100 0x0003c022 0x00000000 0x00000000
+GPP_V16 (0xD1,0x20) 0x84000100 0x0003c023 0x00000000 0x00000000
+GPP_V17 (0xD1,0x22) 0x84000100 0x0003c024 0x00000000 0x00000000
+GPP_V18 (0xD1,0x24) 0x44000300 0x00000025 0x00000000 0x00000000
+GPP_V19 (0xD1,0x26) 0x84000602 0x0003c026 0x00000000 0x00000000
+GPP_V20 (0xD1,0x28) 0x44000300 0x00000027 0x00000000 0x00000000
+GPP_V21 (0xD1,0x2A) 0x44000300 0x00000028 0x00000000 0x00000000
+GPP_V22 (0xD1,0x2C) 0x44000300 0x00000029 0x00000000 0x00000000
+GPP_V23 (0xD1,0x2E) 0x44000300 0x0000002a 0x00000000 0x00000000
+GPP_C0 (0xD1,0x30) 0x44000600 0x0003c02b 0x00000000 0x00000000
+GPP_C1 (0xD1,0x32) 0x44000602 0x0003c02c 0x00000000 0x00000000
+GPP_C2 (0xD1,0x34) 0x44000600 0x0003c02d 0x00000000 0x00000000
+GPP_C3 (0xD1,0x36) 0x84000100 0x0003c02e 0x00000000 0x00000000
+GPP_C4 (0xD1,0x38) 0x84000100 0x0003c02f 0x00000000 0x00000000
+GPP_C5 (0xD1,0x3A) 0x84000702 0x0003f030 0x00000000 0x00000000
+GPP_C6 (0xD1,0x3C) 0x84000702 0x0003f031 0x00000000 0x00000000
+GPP_C7 (0xD1,0x3E) 0x84000102 0x00000032 0x00000800 0x00000000
+GPP_C8 (0xD1,0x40) 0x84000702 0x0003c033 0x00000000 0x00000000
+GPP_C9 (0xD1,0x42) 0x84000702 0x0003c034 0x00000000 0x00000000
+GPP_C10 (0xD1,0x44) 0x84000100 0x00000035 0x00000000 0x00000000
+GPP_C11 (0xD1,0x46) 0x84000702 0x0003c036 0x00000000 0x00000000
+GPP_C12 (0xD1,0x48) 0x84000702 0x0003c037 0x00000000 0x00000000
+GPP_C13 (0xD1,0x4A) 0x84000100 0x00000038 0x00000000 0x00000000
+GPP_C14 (0xD1,0x4C) 0x44000300 0x00000039 0x00000000 0x00000000
+GPP_C15 (0xD1,0x4E) 0x44000702 0x0000003a 0x00000000 0x00000000
+GPP_C16 (0xD1,0x50) 0x44000702 0x0000003b 0x00000000 0x00000000
+GPP_C17 (0xD1,0x52) 0x44000702 0x0000003c 0x00000000 0x00000000
+GPP_C18 (0xD1,0x54) 0x44000300 0x0000003d 0x00000000 0x00000000
+GPP_C19 (0xD1,0x56) 0x44000300 0x0000003e 0x00000000 0x00000000
+GPP_C20 (0xD1,0x58) 0x84000100 0x0000003f 0x00000000 0x00000000
+GPP_C21 (0xD1,0x5A) 0x44000700 0x0001c040 0x00000000 0x00000000
+GPP_C22 (0xD1,0x5C) 0x44000700 0x0001c041 0x00000000 0x00000000
+GPP_C23 (0xD1,0x5E) 0x84000100 0x00000042 0x00000000 0x00000000
+GPP_A0 (0xD2,0x00) 0x84000700 0x0003f048 0x00000000 0x00000000
+GPP_A1 (0xD2,0x02) 0x84000702 0x0003f049 0x00000000 0x00000000
+GPP_A2 (0xD2,0x04) 0x84000700 0x0003f04a 0x00000000 0x00000000
+GPP_A3 (0xD2,0x06) 0x84000700 0x0003f04b 0x00000000 0x00000000
+GPP_A4 (0xD2,0x08) 0x84000700 0x0003f04c 0x00000000 0x00000000
+GPP_A5 (0xD2,0x0A) 0x84000700 0x0003f04d 0x00000000 0x00000000
+GPP_A6 (0xD2,0x0C) 0x84000700 0x0003c04e 0x00000000 0x00000000
+GPP_A7 (0xD2,0x0E) 0x44000300 0x0000004f 0x00000000 0x00000000
+GPP_A8 (0xD2,0x10) 0x44000300 0x00000050 0x00000000 0x00000000
+GPP_A9 (0xD2,0x12) 0x44000300 0x00000051 0x00000000 0x00000000
+GPP_A10 (0xD2,0x14) 0x44000300 0x00000052 0x00000000 0x00000000
+GPP_A11 (0xD2,0x16) 0x84000102 0x00000053 0x00000000 0x00000000
+GPP_A12 (0xD2,0x18) 0x84000102 0x00000054 0x00000000 0x00000000
+GPP_A13 (0xD2,0x1A) 0x84000102 0x00003055 0x00000000 0x00000000
+GPP_A14 (0xD2,0x1C) 0x84000102 0x00003056 0x00000000 0x00000000
+GPP_A15 (0xD2,0x1E) 0x84000100 0x00000057 0x00000000 0x00000000
+GPP_A16 (0xD2,0x20) 0x84000702 0x0003f058 0x00000000 0x00000000
+GPP_A17 (0xD2,0x22) 0x84000102 0x00003059 0x00000000 0x00000000
+GPP_A18 (0xD2,0x24) 0x84000102 0x0000305a 0x00000000 0x00000000
+GPP_A19 (0xD2,0x26) 0x44000102 0x0000305b 0x00000000 0x00000000
+GPP_A20 (0xD2,0x28) 0x44000100 0x00003c5c 0x00000000 0x00000000
+GPP_A21 (0xD2,0x2A) 0x44000702 0x0003fc5d 0x00000000 0x00000000
+GPP_E0 (0xD2,0x32) 0x84000100 0x00000060 0x00000000 0x00000000
+GPP_E1 (0xD2,0x34) 0x84000100 0x00000061 0x00000000 0x00000000
+GPP_E2 (0xD2,0x36) 0x84000100 0x00000062 0x00000000 0x00000000
+GPP_E3 (0xD2,0x38) 0x84000100 0x00000063 0x00000000 0x00000000
+GPP_E4 (0xD2,0x3A) 0x84000200 0x00000064 0x00000000 0x00000000
+GPP_E5 (0xD2,0x3C) 0x84000201 0x00000065 0x00000000 0x00000000
+GPP_E6 (0xD2,0x3E) 0x84000102 0x00000066 0x00000800 0x00000000
+GPP_E7 (0xD2,0x40) 0x84000100 0x00000067 0x00000000 0x00000000
+GPP_E8 (0xD2,0x42) 0x84000702 0x0001c068 0x00000000 0x00000000
+GPP_E9 (0xD2,0x44) 0x84000100 0x00000069 0x00000000 0x00000000
+GPP_E10 (0xD2,0x46) 0x84000100 0x0000006a 0x00000000 0x00000000
+GPP_E11 (0xD2,0x48) 0x84000100 0x0000006b 0x00000000 0x00000000
+GPP_E12 (0xD2,0x4A) 0x84000100 0x0000006c 0x00000000 0x00000000
+GPP_E13 (0xD2,0x4C) 0x84000100 0x0000006d 0x00000000 0x00000000
+GPP_E14 (0xD2,0x4E) 0x84000700 0x0002406e 0x00000000 0x00000000
+GPP_E15 (0xD2,0x50) 0x84000100 0x0000006f 0x00000000 0x00000000
+GPP_E16 (0xD2,0x52) 0x84000b02 0x0003c070 0x00000000 0x00000000
+GPP_E17 (0xD2,0x54) 0x84000100 0x00000071 0x00000000 0x00000000
+GPP_E18 (0xD2,0x56) 0x44000300 0x00000072 0x00000000 0x00000000
+GPP_E19 (0xD2,0x58) 0x44000300 0x00000073 0x00000000 0x00000000
+GPP_E20 (0xD2,0x5A) 0x44000300 0x00000074 0x00000000 0x00000000
+GPP_E21 (0xD2,0x5C) 0x44000300 0x00000075 0x00000000 0x00000000
+GPP_E22 (0xD2,0x5E) 0x84000700 0x0001d076 0x00000000 0x00000000
+GPP_H0 (0xD3,0x00) 0x84000100 0x00000018 0x00000000 0x00000000
+GPP_H1 (0xD3,0x02) 0x84000100 0x00000019 0x00000000 0x00000000
+GPP_H2 (0xD3,0x04) 0x84000100 0x0000001a 0x00000000 0x00000000
+GPP_H3 (0xD3,0x06) 0x44000300 0x0000001b 0x00000000 0x00000000
+GPP_H4 (0xD3,0x08) 0x84000b00 0x0000001c 0x00000000 0x00000000
+GPP_H5 (0xD3,0x0A) 0x84000b00 0x0000001d 0x00000000 0x00000000
+GPP_H6 (0xD3,0x0C) 0x84000102 0x0000301e 0x00000000 0x00000000
+GPP_H7 (0xD3,0x0E) 0x84000102 0x0000301f 0x00000000 0x00000000
+GPP_H8 (0xD3,0x10) 0x84000100 0x00000020 0x00000000 0x00000000
+GPP_H9 (0xD3,0x12) 0x84000100 0x00000021 0x00000000 0x00000000
+GPP_H10 (0xD3,0x14) 0x84000100 0x00000022 0x00000000 0x00000000
+GPP_H11 (0xD3,0x16) 0x84000100 0x00000023 0x00000000 0x00000000
+GPP_H12 (0xD3,0x18) 0x44000300 0x00000024 0x00000000 0x00000000
+GPP_H13 (0xD3,0x1A) 0x84000100 0x0003c025 0x00000000 0x00000000
+GPP_H14 (0xD3,0x1C) 0x84000100 0x00000026 0x00000000 0x00000000
+GPP_H15 (0xD3,0x1E) 0x84000201 0x00000027 0x00000000 0x00000000
+GPP_H16 (0xD3,0x20) 0x84000700 0x0001c028 0x00000000 0x00000000
+GPP_H17 (0xD3,0x22) 0x84000602 0x0001c029 0x00000000 0x00000000
+GPP_H18 (0xD3,0x24) 0x44000300 0x0000002a 0x00000000 0x00000000
+GPP_H19 (0xD3,0x26) 0x84000702 0x0000002b 0x00000000 0x00000000
+GPP_H20 (0xD3,0x28) 0x84000702 0x0000002c 0x00000000 0x00000000
+GPP_H21 (0xD3,0x2A) 0x84000201 0x0000002d 0x00000000 0x00000000
+GPP_H22 (0xD3,0x2C) 0x84000100 0x0000002e 0x00000000 0x00000000
+GPP_F0 (0xD3,0x34) 0x84000700 0x0003c030 0x00000000 0x00000000
+GPP_F1 (0xD3,0x36) 0x84000702 0x0003f031 0x00000000 0x00000000
+GPP_F2 (0xD3,0x38) 0x84000700 0x0003c032 0x00000000 0x00000000
+GPP_F3 (0xD3,0x3A) 0x84000700 0x0003f033 0x00000000 0x00000000
+GPP_F4 (0xD3,0x3C) 0x84000700 0x0003c034 0x00000000 0x00000000
+GPP_F5 (0xD3,0x3E) 0x84000f00 0x0003c035 0x00000000 0x00000000
+GPP_F6 (0xD3,0x40) 0x84000700 0x0003c036 0x00000000 0x00000000
+GPP_F7 (0xD3,0x42) 0x04000201 0x00001037 0x00000000 0x00000000
+GPP_F8 (0xD3,0x44) 0x84000100 0x00001038 0x00000000 0x00000000
+GPP_F9 (0xD3,0x46) 0x84000100 0x00000039 0x00000000 0x00000000
+GPP_F10 (0xD3,0x48) 0x84000100 0x0000003a 0x00000000 0x00000000
+GPP_F11 (0xD3,0x4A) 0x84000100 0x0000003b 0x00000000 0x00000000
+GPP_F12 (0xD3,0x4C) 0x84000100 0x0000003c 0x00000000 0x00000000
+GPP_F13 (0xD3,0x4E) 0x84000100 0x0000003d 0x00000000 0x00000000
+GPP_F14 (0xD3,0x50) 0x84000100 0x0000003e 0x00000000 0x00000000
+GPP_F15 (0xD3,0x52) 0x84000100 0x0000003f 0x00000000 0x00000000
+GPP_F16 (0xD3,0x54) 0x84000100 0x00000040 0x00000000 0x00000000
+GPP_F17 (0xD3,0x56) 0x84000100 0x00000041 0x00000000 0x00000000
+GPP_F18 (0xD3,0x58) 0x84000100 0x00000042 0x00000000 0x00000000
+GPP_F19 (0xD3,0x5A) 0x84000100 0x00000043 0x00000000 0x00000000
+GPP_F20 (0xD3,0x5C) 0x84000100 0x00000044 0x00000000 0x00000000
+GPP_F21 (0xD3,0x5E) 0x84000100 0x00000045 0x00000800 0x00000000
+GPP_F22 (0xD3,0x60) 0x84000100 0x00000046 0x00000000 0x00000000
+GPP_F23 (0xD3,0x62) 0x84000100 0x00000047 0x00000000 0x00000000
+GPP_S0 (0xD4,0x00) 0x84000100 0x0183c050 0x00000000 0x00000000
+GPP_S1 (0xD4,0x02) 0x84000100 0x0183c051 0x00000000 0x00000000
+GPP_S2 (0xD4,0x04) 0x84000100 0x01800052 0x00000000 0x00000000
+GPP_S3 (0xD4,0x06) 0x84000100 0x01800053 0x00000000 0x00000000
+GPP_S4 (0xD4,0x08) 0x84000100 0x01800054 0x00000000 0x00000000
+GPP_S5 (0xD4,0x0A) 0x84000100 0x01800055 0x00000000 0x00000000
+GPP_S6 (0xD4,0x0C) 0x84000100 0x01800056 0x00000000 0x00000000
+GPP_S7 (0xD4,0x0E) 0x84000100 0x01800057 0x00000000 0x00000000
+GPP_B0 (0xD5,0x00) 0x84000100 0x00000058 0x00000000 0x00000000
+GPP_B1 (0xD5,0x02) 0x84000100 0x00000059 0x00000000 0x00000000
+GPP_B2 (0xD5,0x04) 0x84000100 0x0000005a 0x00000000 0x00000000
+GPP_B3 (0xD5,0x06) 0x84000100 0x0000005b 0x00000000 0x00000000
+GPP_B4 (0xD5,0x08) 0x84000100 0x0000005c 0x00000000 0x00000000
+GPP_B5 (0xD5,0x0A) 0x84000100 0x0000005d 0x00000000 0x00000000
+GPP_B6 (0xD5,0x0C) 0x84000100 0x0000005e 0x00000000 0x00000000
+GPP_B7 (0xD5,0x0E) 0x84000102 0x0000005f 0x00000000 0x00000000
+GPP_B8 (0xD5,0x10) 0x84000201 0x00000060 0x00000000 0x00000000
+GPP_B9 (0xD5,0x12) 0x84000100 0x00000061 0x00000000 0x00000000
+GPP_B10 (0xD5,0x14) 0x84000100 0x00000062 0x00000000 0x00000000
+GPP_B11 (0xD5,0x16) 0x84000100 0x00000063 0x00000000 0x00000000
+GPP_B12 (0xD5,0x18) 0x84000100 0x00000064 0x00000000 0x00000000
+GPP_B13 (0xD5,0x1A) 0x84000700 0x0003c065 0x00000000 0x00000000
+GPP_B14 (0xD5,0x1C) 0x84000100 0x00000066 0x00000000 0x00000000
+GPP_B15 (0xD5,0x1E) 0x84000100 0x00000067 0x00000000 0x00000000
+GPP_B16 (0xD5,0x20) 0x84000b02 0x00024068 0x00000000 0x00000000
+GPP_B17 (0xD5,0x22) 0x84000100 0x00000069 0x00000000 0x00000000
+GPP_B18 (0xD5,0x24) 0x84000201 0x0000006a 0x00000000 0x00000000
+GPP_B19 (0xD5,0x26) 0x84000201 0x0000006b 0x00000000 0x00000000
+GPP_B20 (0xD5,0x28) 0x84000100 0x0000006c 0x00000000 0x00000000
+GPP_B21 (0xD5,0x2A) 0x84000100 0x0000006d 0x00000000 0x00000000
+GPP_B22 (0xD5,0x2C) 0x84000100 0x0000006e 0x00000000 0x00000000
+GPP_B23 (0xD5,0x2E) 0x84000100 0x0000006f 0x00000000 0x00000000
+GPP_D0 (0xD5,0x32) 0x04000200 0x00000070 0x00000000 0x00000000
+GPP_D1 (0xD5,0x34) 0x84000100 0x00000071 0x00000000 0x00000000
+GPP_D2 (0xD5,0x36) 0x84000100 0x00000072 0x00000000 0x00000000
+GPP_D3 (0xD5,0x38) 0x84000100 0x00000073 0x00000000 0x00000000
+GPP_D4 (0xD5,0x3A) 0x04000201 0x00000074 0x00000000 0x00000000
+GPP_D5 (0xD5,0x3C) 0x84000201 0x00000075 0x00000000 0x00000000
+GPP_D6 (0xD5,0x3E) 0x84000201 0x00000076 0x00000000 0x00000000
+GPP_D7 (0xD5,0x40) 0x84000201 0x00000077 0x00000000 0x00000000
+GPP_D8 (0xD5,0x42) 0x84000201 0x00000018 0x00000000 0x00000000
+GPP_D9 (0xD5,0x44) 0x04000200 0x00000019 0x00000000 0x00000000
+GPP_D10 (0xD5,0x46) 0x84000600 0x0003c01a 0x00000000 0x00000000
+GPP_D11 (0xD5,0x48) 0x84000700 0x0003fc1b 0x00000000 0x00000000
+GPP_D12 (0xD5,0x4A) 0x84000600 0x0003fc1c 0x00000000 0x00000000
+GPP_D13 (0xD5,0x4C) 0x84000700 0x0003fc1d 0x00000000 0x00000000
+GPP_D14 (0xD5,0x4E) 0x84000100 0x0000001e 0x00000000 0x00000000
+GPP_D15 (0xD5,0x50) 0x84000100 0x0000001f 0x00000000 0x00000000
+GPP_D16 (0xD5,0x52) 0x84000100 0x00000020 0x00000000 0x00000000
+GPP_D17 (0xD5,0x54) 0x84000700 0x0003c021 0x00000000 0x00000000
+GPP_D18 (0xD5,0x56) 0x44000700 0x00000022 0x00000000 0x00000000
+GPP_D19 (0xD5,0x58) 0x44000300 0x00000023 0x00000000 0x00000000
+GPP_D20 (0xD5,0x5A) 0x44000702 0x00000024 0x00000000 0x00000000
+GPP_D21 (0xD5,0x5C) 0x44000700 0x0003c025 0x00000000 0x00000000
+GPP_D22 (0xD5,0x5E) 0x84000102 0x00003c26 0x00000000 0x00000000
+GPP_D23 (0xD5,0x60) 0x84000100 0x00003c27 0x00000000 0x00000000
+## HDAUDIO ##
+hdaudioC0D0
+  vendor_name: Realtek
+  chip_name: ALC256
+  vendor_id: 0x10ec0256
+  subsystem_id: 0x18490256
+  revision_id: 0x100002
+  0x12: 0x40000000
+  0x13: 0x411111f0
+  0x14: 0x411111f0
+  0x18: 0x411111f0
+  0x19: 0x02a11020
+  0x1a: 0x411111f0
+  0x1b: 0x411111f0
+  0x1d: 0x40400001
+  0x1e: 0x411111f0
+  0x21: 0x02211010
+hdaudioC0D2
+  vendor_name: Intel
+  chip_name: Meteor Lake HDMI
+  vendor_id: 0x8086281d
+  subsystem_id: 0x80860101
+  revision_id: 0x100000
+  0x04: 0x18560010
+  0x06: 0x18560010
+  0x08: 0x18560010
+  0x0a: 0x18560010
+  0x0b: 0x18560010
+  0x0c: 0x18560010
+  0x0d: 0x18560010
+  0x0e: 0x18560010
+  0x0f: 0x18560010
diff --git a/models/meer9/coreboot.config b/models/meer9/coreboot.config
new file mode 100644
index 00000000..3153afd5
--- /dev/null
+++ b/models/meer9/coreboot.config
@@ -0,0 +1,22 @@
+CONFIG_VENDOR_SYSTEM76=y
+CONFIG_BOARD_SYSTEM76_MEER9=y
+CONFIG_CCACHE=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Fsp.fd"
+CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Include"
+CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_HAVE_ME_BIN=y
+CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
+CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
+CONFIG_PAYLOAD_ELF=y
+CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
+CONFIG_POST_IO=n
+CONFIG_SMMSTORE=y
+CONFIG_SMMSTORE_V2=y
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
+# Debug
+CONFIG_CONSOLE_SERIAL=n
diff --git a/models/meer9/edk2.config b/models/meer9/edk2.config
new file mode 100644
index 00000000..b2378083
--- /dev/null
+++ b/models/meer9/edk2.config
@@ -0,0 +1,9 @@
+BOOTLOADER=COREBOOT
+DISABLE_SERIAL_TERMINAL=TRUE
+PLATFORM_BOOT_TIMEOUT=2
+PS2_KEYBOARD_ENABLE=TRUE
+SECURE_BOOT_ENABLE=TRUE
+SERIAL_DRIVER_ENABLE=FALSE
+SHELL_TYPE=NONE
+TPM_ENABLE=TRUE
+#SYSTEM76_EC_LOGGING=TRUE
diff --git a/models/meer9/fd.rom b/models/meer9/fd.rom
new file mode 100644
index 00000000..63688345
--- /dev/null
+++ b/models/meer9/fd.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:dbc439558298b794b317f8a2c7b3f35e8712e821888ba7a4a5c6d16f7c806cba
+size 16384
diff --git a/models/meer9/gpio.c b/models/meer9/gpio.c
new file mode 100644
index 00000000..a206537e
--- /dev/null
+++ b/models/meer9/gpio.c
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config gpio_table[] = {
+	PAD_CFG_NF(GPP_A0, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_A2, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_A3, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_A4, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_A5, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_A6, NONE, PLTRST, NF1),
+	PAD_NC(GPP_A7, NONE),
+	PAD_NC(GPP_A8, NONE),
+	PAD_NC(GPP_A9, NONE),
+	PAD_NC(GPP_A10, NONE),
+	PAD_CFG_GPI(GPP_A11, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_A12, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_A13, UP_20K, PLTRST),
+	PAD_CFG_GPI(GPP_A14, UP_20K, PLTRST),
+	PAD_CFG_GPI(GPP_A15, NONE, PLTRST),
+	PAD_CFG_NF(GPP_A16, UP_20K, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_A17, UP_20K, PLTRST),
+	PAD_CFG_GPI(GPP_A18, UP_20K, PLTRST),
+	PAD_CFG_GPI(GPP_A19, UP_20K, DEEP),
+	PAD_CFG_GPI(GPP_A20, NATIVE, DEEP),
+	PAD_CFG_NF(GPP_A21, NATIVE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_B0, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B1, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B2, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B3, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B4, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B5, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B6, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B7, NONE, PLTRST),
+	PAD_CFG_GPO(GPP_B8, 1, PLTRST),
+	PAD_CFG_GPI(GPP_B9, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B10, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B11, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B12, NONE, PLTRST),
+	PAD_CFG_NF(GPP_B13, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_B14, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B15, NONE, PLTRST),
+	PAD_CFG_NF(GPP_B16, NONE, PLTRST, NF2),
+	PAD_CFG_GPI(GPP_B17, NONE, PLTRST),
+	PAD_CFG_GPO(GPP_B18, 1, PLTRST),
+	PAD_CFG_GPO(GPP_B19, 1, PLTRST),
+	PAD_CFG_GPI(GPP_B20, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B21, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B22, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_B23, NONE, PLTRST),
+	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C2, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_C3, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_C4, NONE, PLTRST),
+	PAD_CFG_NF(GPP_C5, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_C6, UP_20K, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_C7, NONE, PLTRST),
+	PAD_CFG_NF(GPP_C8, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_C9, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_C10, NONE, PLTRST),
+	PAD_CFG_NF(GPP_C11, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_C12, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_C13, NONE, PLTRST),
+	PAD_NC(GPP_C14, NONE),
+	PAD_CFG_NF(GPP_C15, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
+	PAD_NC(GPP_C18, NONE),
+	PAD_NC(GPP_C19, NONE),
+	PAD_CFG_GPI(GPP_C20, NONE, PLTRST),
+	PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_C23, NONE, PLTRST),
+	PAD_CFG_GPO(GPP_D0, 0, PWROK),
+	PAD_CFG_GPI(GPP_D1, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_D2, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_D3, NONE, PLTRST),
+	PAD_CFG_GPO(GPP_D4, 1, PWROK),
+	PAD_CFG_GPO(GPP_D5, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D6, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D7, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D8, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D9, 0, PWROK),
+	PAD_CFG_NF(GPP_D10, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_D11, NATIVE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_D12, NATIVE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_D13, NATIVE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_D14, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_D15, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_D16, NONE, PLTRST),
+	PAD_CFG_NF(GPP_D17, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
+	PAD_NC(GPP_D19, NONE),
+	PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_D22, NATIVE, PLTRST),
+	PAD_CFG_GPI(GPP_D23, NATIVE, PLTRST),
+	PAD_CFG_GPI(GPP_E0, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E1, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E2, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E3, NONE, PLTRST),
+	PAD_CFG_GPO(GPP_E4, 0, PLTRST),
+	PAD_CFG_GPO(GPP_E5, 1, PLTRST),
+	PAD_CFG_GPI(GPP_E6, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E7, NONE, PLTRST),
+	PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_E9, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E10, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E11, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E12, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_E13, NONE, PLTRST),
+	PAD_CFG_NF(GPP_E14, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_E15, NONE, PLTRST),
+	PAD_CFG_NF(GPP_E16, NONE, PLTRST, NF2),
+	PAD_CFG_GPI(GPP_E17, NONE, PLTRST),
+	PAD_NC(GPP_E18, NONE),
+	PAD_NC(GPP_E19, NONE),
+	PAD_NC(GPP_E20, NONE),
+	PAD_NC(GPP_E21, NONE),
+	PAD_CFG_NF(GPP_E22, DN_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_F0, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_F1, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_F2, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_F3, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_F4, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_F5, NONE, PLTRST, NF3),
+	PAD_CFG_NF(GPP_F6, NONE, PLTRST, NF1),
+	PAD_CFG_TERM_GPO(GPP_F7, 1, DN_20K, PWROK),
+	PAD_CFG_GPI(GPP_F8, DN_20K, PLTRST),
+	PAD_CFG_GPI(GPP_F9, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F10, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F11, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F12, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F13, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F14, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F15, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F16, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F17, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F18, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F19, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F20, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F21, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F22, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_F23, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H0, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H1, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H2, NONE, PLTRST),
+	PAD_NC(GPP_H3, NONE),
+	PAD_CFG_NF(GPP_H4, NONE, PLTRST, NF2),
+	PAD_CFG_NF(GPP_H5, NONE, PLTRST, NF2),
+	PAD_CFG_GPI(GPP_H6, UP_20K, PLTRST),
+	PAD_CFG_GPI(GPP_H7, UP_20K, PLTRST),
+	PAD_CFG_GPI(GPP_H8, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H9, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H10, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H11, NONE, PLTRST),
+	PAD_NC(GPP_H12, NONE),
+	PAD_CFG_GPI(GPP_H13, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_H14, NONE, PLTRST),
+	PAD_CFG_GPO(GPP_H15, 1, PLTRST),
+	PAD_CFG_NF(GPP_H16, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_H17, NONE, PLTRST, NF1),
+	PAD_NC(GPP_H18, NONE),
+	PAD_CFG_NF(GPP_H19, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_H20, NONE, PLTRST, NF1),
+	PAD_CFG_GPO(GPP_H21, 1, PLTRST),
+	PAD_CFG_GPI(GPP_H22, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S0, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S1, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S2, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S3, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S4, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S5, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S6, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_S7, NONE, PLTRST),
+	PAD_CFG_NF(GPP_V0, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V1, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V2, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V3, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V4, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V5, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_V6, NATIVE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_V7, NATIVE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_V8, UP_20K, PLTRST, NF1),
+	PAD_CFG_NF(GPP_V9, NONE, PLTRST, NF1),
+	PAD_CFG_NF(GPP_V10, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_V11, NONE, PLTRST),
+	PAD_NC(GPP_V12, NONE),
+	PAD_CFG_NF(GPP_V13, NONE, PLTRST, NF1),
+	PAD_CFG_GPI(GPP_V14, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_V15, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_V16, NONE, PLTRST),
+	PAD_CFG_GPI(GPP_V17, NONE, PLTRST),
+	PAD_NC(GPP_V18, NONE),
+	PAD_CFG_NF(GPP_V19, NONE, PLTRST, NF1),
+	PAD_NC(GPP_V20, NONE),
+	PAD_NC(GPP_V21, NONE),
+	PAD_NC(GPP_V22, NONE),
+	PAD_NC(GPP_V23, NONE),
+};
+
+void mainboard_configure_gpios(void)
+{
+	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}
diff --git a/models/meer9/hda_verb.c b/models/meer9/hda_verb.c
new file mode 100644
index 00000000..05f1ce13
--- /dev/null
+++ b/models/meer9/hda_verb.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* Realtek, ALC256 */
+	0x10ec0256, /* Vendor ID */
+	0x18490256, /* Subsystem ID */
+	12, /* Number of entries */
+	AZALIA_SUBVENDOR(0, 0x18490256),
+	AZALIA_RESET(1),
+	AZALIA_PIN_CFG(0, 0x12, 0x40000000),
+	AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x14, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x19, 0x02a11020),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x21, 0x02211010),
+	/* Intel, MeteorLakeHDMI */
+	0x8086281d, /* Vendor ID */
+	0x80860101, /* Subsystem ID */
+	11, /* Number of entries */
+	AZALIA_SUBVENDOR(2, 0x80860101),
+	AZALIA_RESET(1),
+	AZALIA_PIN_CFG(2, 0x04, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x06, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x08, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
+	AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/models/meer9/me.rom b/models/meer9/me.rom
new file mode 100644
index 00000000..1cf1d779
--- /dev/null
+++ b/models/meer9/me.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:161f9f1772655c2b0a3b07c0b66899874c1a88188cc9a6b32ad523e8afb6ab7c
+size 10403840
diff --git a/models/meer9/microcode.rom b/models/meer9/microcode.rom
new file mode 100755
index 00000000..e1c7c132
--- /dev/null
+++ b/models/meer9/microcode.rom
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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