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LoadCell-Main.sch
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LoadCell-Main.sch
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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:_Active
LIBS:_Connector
LIBS:_Passive
LIBS:LoadCell-cache
EELAYER 25 0
EELAYER END
$Descr USLetter 11000 8500
encoding utf-8
Sheet 2 2
Title "gQuintic LoadCell Adapter"
Date "4-May-2018"
Rev "revA"
Comp "Synthetos"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
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F 1 "Fiducial_Top" H 5150 5350 40 0000 C CNN
F 2 "_Connector:Fiducial_0.040_Top" H 5150 5450 150 0001 C CNN
F 3 "" H 5150 5450 150 0000 C CNN
1 5150 5450
1 0 0 -1
$EndComp
$Comp
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F 3 "" H 5600 5450 150 0000 C CNN
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1 0 0 -1
$EndComp
$Comp
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F 3 "" H 6050 5450 150 0000 C CNN
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$EndComp
$Comp
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F 3 "" H 7750 4050 50 0000 C CNN
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1 0 0 -1
$EndComp
$Comp
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F 3 "" H 7150 4050 50 0000 C CNN
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1 0 0 -1
$EndComp
$Comp
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F 3 "" H 5700 3800 50 0000 C CNN
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$EndComp
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$EndComp
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Wire Wire Line
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1 5350 3650
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$EndComp
$Comp
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$EndComp
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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$Comp
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F 3 "" H 6900 3800 50 0000 C CNN
1 6900 3800
-1 0 0 1
$EndComp
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$EndComp
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$Comp
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$Comp
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$EndComp
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$Comp
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$EndComp
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Wire Wire Line
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$EndSCHEMATC