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####################################### AI Engine Development #######################################

More Information

See AMD Vitis™ Development Environment on xilinx.com

The tutorials under the AI Engine Development help you learn how to target, develop, and deploy advanced algorithms using a Versal AI Engine array in conjunction with PL IP/kernels and software applications running on the embedded processors. To successfully deploy AI Engine applications in hardware, you need to be aware of the Vitis and AI Engine tools and flows.

Tutorials target the VCK190 board. The table below lists the tutorials available, and the features and flows showcased in all of these tutorials. The various columns correspond to specific features/flows supported in these tutorials and will help you identify tutorials that showcase specific flows and features that you are interested in.

Getting Started

AI Engine Documentation

To easily find the right documentation corresponding to the development stage you are at, we recommend you use the AI Engine Design Process Hub.

The major documentation for AI Engine includes:

  • Versal ACAP AI Engine Architecture Manual (AM009)
  • AI Engine Tools and Flows (UG1076)
  • AI Engine Kernel and Graph Programming Guide (UG1079)

AI Engine Training

If you are new with AI Engine, the following training courses can help you understand the architecture and design flow.

Environment Settings

Important

Before beginning a tutorial, read and follow the Vitis Software Platform Release Notes (v2024.1) for setting up software and installing the VCK190 base platform.

Run the following steps to set up the environment (do NOT apply to tutorials that do not use the VCK190 base platform):

  1. Set up your platform by running the xilinx-versal-common-v2024.1/environment-setup-cortexa72-cortexa53-xilinx-linux script as provided in the platform download. This script sets up the SYSROOT and CXX variables. If the script is not present, you must run the xilinx-versal-common-v2024.1/sdk.sh.
  2. Set up your ROOTFS to point to the xilinx-versal-common-v2024.1/rootfs.ext4.
  3. Set up your IMAGE to point to xilinx-versal-common-v2024.1/Image.
  4. Set up your PLATFORM_REPO_PATHS environment variable based upon where you downloaded the platform.

Getting Started with AI Engine Development Using the AI Engine Tutorials

AI Engine Development Flow

If you are new with the AI Engine Architecture and tools, we recommend that you start with the :doc:`A to Z Bare-metal Flow <./Feature_Tutorials/01-aie_a_to_z/README>`, which will guide you through the entire flow from platform creation in AMD Vivado™ to AI Engine application creation, system integration, and testing on Hardware using the Vitis IDE.

AI Engine Application Development

To get started with AI Engine application development, we recommend that you look at the following tutorials:

The following tutorials describe some features of the AI Engine, which might be useful for your application:

AI Engine Application Debug and Optimization

After you have written your first AI Engine application you might want to verify the correct functionality of your graphs and kernels using x86 simulation and AI Engine simulation. In this regards, the following tutorials will be useful for you:

System Integration

When your AI Engine Application meets your expectation (in terms of functionality and performances), it will be the right time to integrate it with the rest of the Versal System. At this stage, the following tutorials will be useful for you:

Feature Tutorials

These tutorials target the VCK190 board. The table below lists the tutorials available, and the features and flows showcased in all of these tutorials. The various columns correspond to specific features/flows supported in these tutorials and will help you identify tutorials that showcase specific flows and features that you are interested in.

.. toctree::
   :maxdepth: 3
   :caption: Feature Tutorials
   :hidden:

   Feature Tutorials <./Feature_Tutorials/Feature_Tutorials.rst>


Feature Tutorials
Tutorial Platform OS IDE Flow Libraries Used HLS Kernel x86 simulator aie simulator SW Emu HW Emu HW Event Trace in HW Profile in HW
:doc:`AI Engine A-to-Z Flow for Linux <./Feature_Tutorials/18-aie_a_to_z_custom_linux_platform/README>` Base / Custom Linux     MM2S / S2MM Yes Yes Yes Yes Yes    
:doc:`A to Z Bare-metal Flow <./Feature_Tutorials/01-aie_a_to_z/README>` Custom Baremetal Vivado, Vitis IDE   MM2S / S2MM   Yes   Yes Yes    
:doc:`Using GMIO with AIE <./Feature_Tutorials/02-using-gmio/README>` Base Linux         Yes   Yes Yes   Yes
:doc:`Runtime Parameter Reconfiguration <./Feature_Tutorials/03-rtp-reconfiguration/README>` Base Linux     MM2S / S2MM   Yes   Yes Yes    
:doc:`Packet Switching <./Feature_Tutorials/04-packet-switching/README>` Base Linux     MM2S / S2MM   Yes   Yes Yes    
:doc:`AIE Versal Integration <./Feature_Tutorials/05-AI-engine-versal-integration/README>` Base Linux CLI, Vitis Unified IDE   MM2S / S2MM Yes Yes Yes Yes Yes    
:doc:`Versal System Design Clocking <./Feature_Tutorials/06-versal-system-design-clocking-tutorial/README>` Base Linux     MM2S / S2MM   Yes   Yes Yes    
:doc:`Using Floating-Point in the AIE <./Feature_Tutorials/07-AI-Engine-Floating-Point/README>` Base Linux         Yes          
:doc:`DSP Library Tutorial <./Feature_Tutorials/08-dsp-library/README>` Base Linux   DSPLib MM2S / S2MM Variant   Yes          
:doc:`Debug Walkthrough Tutorial <./Feature_Tutorials/09-debug-walkthrough/README>` Base Linux Vitis IDE     Yes Yes Yes Yes Yes Yes Yes
:doc:`AIE DSPLib and Model Composer <./Feature_Tutorials/10-aie-dsp-lib-model-composer/README>` Base Linux Simulink DSPLib MM2S / S2MM Yes Yes          
:doc:`Versal Emulation Waveform Analysis <./Feature_Tutorials/11-ai-engine-emulation-waveform-analysis/README>` Base Linux     Traffic Generators       Yes      
:doc:`AXIS External Traffic Generator <./Feature_Tutorials/12-axis-traffic-generator/README>` Base Linux   DSPLib MM2S / S2MM   Yes   Yes      
:doc:`AIE Performance and Deadlock Analysis <./Feature_Tutorials/13-aie-performance-analysis/README>` Base Linux         Yes   Yes Yes   Yes
:doc:`Implementing an IIR Filter on the AIE <./Feature_Tutorials/14-implementing-iir-filter/README>` Base Linux Vitis IDE     Yes Yes          
:doc:`Post-Link Recompile of an AIE Application <./Feature_Tutorials/15-post-link-recompile/README>` Base Linux     MM2S / S2MM   Yes   Yes Yes    
:doc:`Python and C++ External Traffic Generators for AI Engine Simulation and Emulation Flows <./Feature_Tutorials/16-external-traffic-generator-aie/README>` Base Linux     MM2S / S2MM / PolarClip Yes Yes Yes Yes      
:doc:`Using RTL IP with AI Engines <./Feature_Tutorials/17-RTL-IP-with-AIE-Engines/README>` Custom Linux     MM2S / S2MM   Yes   Yes      
:doc:`Using Verilog Traffic Generators in AIE Simulation <./Feature_Tutorials/19-aie_external_io_sv/README>` Base Linux Vivado     Yes Yes          
:doc:`AIE Compiler Features <./Feature_Tutorials/20-aiecompiler-features/README>` Base Linux     MM2S / S2MM Yes Yes   Yes Yes Yes Yes

Design Tutorials

These tutorials target the VCK190 board. The table below lists the tutorials available, and the features and flows showcased in all of these tutorials. The various columns correspond to specific features/flows supported in these tutorials and will help you identify tutorials that showcase specific flows and features that you are interested in.

.. toctree::
   :maxdepth: 3
   :caption: Design Tutorials
   :hidden:

   Design Tutorials <./Design_Tutorials/Design_Tutorials.rst>



Design Tutorials
Tutorial Platform OS IDE Flow Libraries Used HLS Kernel x86 simulator aie simulator SW Emu HW Emu HW Event Trace in HW Profile in HW
:doc:`Versal Custom Thin Platform Extensible System <./Design_Tutorials/01-Versal_Custom_Thin_Platform_Extensible_System/README>` Custom Linux     MM2S / S2MM / VADD       Yes Yes    
:doc:`LeNet Tutorial <./Design_Tutorials/01-aie_lenet_tutorial/README>` Base Linux     MM2S / S2MM   Yes   Yes Yes   Yes
:doc:`Super Sampling Rate FIR Filters <./Design_Tutorials/02-super_sampling_rate_fir/README>` Base Linux         Yes          
:doc:`Beamforming Design <./Design_Tutorials/03-beamforming/README>` Base Linux         Yes   Yes Yes   Yes
:doc:`Polyphase Channelizer <./Design_Tutorials/04-Polyphase-Channelizer/README>` Base Linux     MM2S / S2MM       Yes Yes    
:doc:`Prime Factor FFT <./Design_Tutorials/05-Prime-Factor-FFT/README>` Base Linux     MM2S / S2MM       Yes Yes    
:doc:`2D-FFT <./Design_Tutorials/06-fft2d_AIEvsHLS/README>` Base Linux   DSPLib PL Data Generator and Checker   Yes   Yes Yes   Yes
:doc:`FIR Filter <./Design_Tutorials/07-firFilter_AIEvsHLS/README>` Base Linux   DSPLib PL Data Generator and Checker   Yes   Yes Yes   Yes
:doc:`N-Body Simulator <./Design_Tutorials/08-n-body-simulator/README>` Base Linux     PL Datamover   Yes   Yes Yes    
:doc:`Digital Down-conversion Chain <./Design_Tutorials/09-ddc_chain/README>` Base Linux       Yes Yes          
:doc:`Versal GeMM Implementation <./Design_Tutorials/10-GeMM_AIEvsDSP/README>` Base Linux   DSPLib Datamover   Yes   Yes Yes   Yes
:doc:`Bilinear Interpolation <./Design_Tutorials/11-Bilinear_Interpolation/README>` Base Linux       Yes Yes