From dcbab5f8dee7b3eabb1c3eded8d292320f6f66ea Mon Sep 17 00:00:00 2001 From: pschatzmann Date: Sat, 17 Feb 2024 18:30:34 +0100 Subject: [PATCH] doxygen --- ...tm32__i2s_1_1_stm32_i2s_class-members.html | 21 +- .../classstm32__i2s_1_1_stm32_i2s_class.html | 156 +++- docs/html/functions.html | 25 +- docs/html/functions_func.html | 25 +- docs/html/search/all_1.js | 12 +- docs/html/search/all_2.js | 9 +- docs/html/search/all_3.js | 3 +- docs/html/search/all_4.js | 6 +- docs/html/search/all_5.js | 8 +- docs/html/search/all_6.js | 10 +- docs/html/search/all_7.js | 4 +- docs/html/search/all_8.js | 4 +- docs/html/search/all_9.js | 2 +- docs/html/search/classes_0.js | 2 +- docs/html/search/classes_1.js | 4 +- docs/html/search/classes_2.js | 2 +- docs/html/search/enums_0.js | 2 +- docs/html/search/files_0.js | 2 +- docs/html/search/files_1.js | 2 +- docs/html/search/functions_0.js | 12 +- docs/html/search/functions_1.js | 9 +- docs/html/search/functions_2.js | 2 +- docs/html/search/functions_3.js | 4 +- docs/html/search/functions_4.js | 7 +- docs/html/search/functions_5.js | 2 +- docs/html/search/functions_6.js | 2 +- docs/html/search/functions_7.js | 2 +- docs/html/search/pages_0.js | 2 +- docs/html/search/searchdata.js | 6 +- docs/html/search/variables_0.js | 2 +- docs/html/stm32-config-i2s_8h_source.html | 40 +- docs/html/stm32-i2s_8h.html | 16 +- docs/html/stm32-i2s_8h_source.html | 770 ++++++++++-------- ...tm32__i2s_1_1_hardware_config-members.html | 10 +- .../structstm32__i2s_1_1_hardware_config.html | 6 +- ...i2s_1_1_i2_s_settings_s_t_m32-members.html | 8 +- ...tstm32__i2s_1_1_i2_s_settings_s_t_m32.html | 6 + 37 files changed, 717 insertions(+), 488 deletions(-) diff --git a/docs/html/classstm32__i2s_1_1_stm32_i2s_class-members.html b/docs/html/classstm32__i2s_1_1_stm32_i2s_class-members.html index bca50d0..c4b5001 100644 --- a/docs/html/classstm32__i2s_1_1_stm32_i2s_class-members.html +++ b/docs/html/classstm32__i2s_1_1_stm32_i2s_class-members.html @@ -72,6 +72,10 @@

This is the complete list of members for stm32_i2s::Stm32I2sClass, including all inherited members.

+ + + + @@ -84,6 +88,8 @@ + + @@ -98,14 +104,13 @@ - - - - - - - - + + + + + + +
begin(I2SSettingsSTM32 settings, bool transmit, bool receive)stm32_i2s::Stm32I2sClassinline
beginReadDMA(I2SSettingsSTM32 settings, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount, void *ref)=nullptr)stm32_i2s::Stm32I2sClassinline
beginReadWriteDMA(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount, void *)=nullptr, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount, void *)=nullptr)stm32_i2s::Stm32I2sClassinline
beginWriteDMA(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount, void *ref)=nullptr)stm32_i2s::Stm32I2sClassinline
cb_dmaIrqRx()stm32_i2s::Stm32I2sClassinlineprotected
cb_dmaIrqTx()stm32_i2s::Stm32I2sClassinlineprotected
cb_HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)stm32_i2s::Stm32I2sClassinlineprotected
DMA1_Stream5_IRQHandler (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassfriend
dma_buffer_rx (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
dma_buffer_tx (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
end() (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassinline
getBytes() (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassinlineprotected
HAL_I2S_MspDeInit (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassfriend
HAL_I2S_MspInit (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassfriend
HAL_I2S_RxCpltCallback (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassfriend
MX_DMA_Init(void)stm32_i2s::Stm32I2sClassinlineprotectedvirtual
MX_GPIO_Init(void)stm32_i2s::Stm32I2sClassinlineprotectedvirtual
MX_I2S3_Init(void)stm32_i2s::Stm32I2sClassinlineprotectedvirtual
readToTransmitCB (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
settings (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
setupDMA(DMA_HandleTypeDef &dma, DMA_Stream_TypeDef *instance, uint32_t channel, uint32_t direction)stm32_i2s::Stm32I2sClassinlineprotected
startI2SReceive(I2SSettingsSTM32 settings, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)stm32_i2s::Stm32I2sClassinline
startI2STransmit(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)stm32_i2s::Stm32I2sClassinline
startI2STransmitReceive(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount), void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)stm32_i2s::Stm32I2sClassinline
stopI2S() (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassinline
writeFromReceiveCB (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
readBytes(uint8_t *data, size_t bytes)stm32_i2s::Stm32I2sClassinline
readToTransmitCB (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
settings (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
setupDMA(DMA_HandleTypeDef &dma, DMA_Stream_TypeDef *instance, uint32_t channel, uint32_t direction)stm32_i2s::Stm32I2sClassinlineprotected
use_dma (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
write(const uint8_t *data, size_t bytes)stm32_i2s::Stm32I2sClassinline
writeFromReceiveCB (defined in stm32_i2s::Stm32I2sClass)stm32_i2s::Stm32I2sClassprotected
diff --git a/docs/html/classstm32__i2s_1_1_stm32_i2s_class.html b/docs/html/classstm32__i2s_1_1_stm32_i2s_class.html index 232808c..084bbe2 100644 --- a/docs/html/classstm32__i2s_1_1_stm32_i2s_class.html +++ b/docs/html/classstm32__i2s_1_1_stm32_i2s_class.html @@ -83,24 +83,37 @@ - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + +

Public Member Functions

-bool startI2STransmit (I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)
 Start to transmit I2S data.
 
-bool startI2SReceive (I2SSettingsSTM32 settings, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)
 Start to receive I2S data.
 
-bool startI2STransmitReceive (I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount), void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)
 Start to receive and transmit I2S data.
 
-void stopI2S ()
 
+bool begin (I2SSettingsSTM32 settings, bool transmit, bool receive)
 start I2S w/o DMA: use write and readBytes
 
+bool beginWriteDMA (I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount, void *ref)=nullptr)
 Start to transmit I2S data.
 
+bool beginReadDMA (I2SSettingsSTM32 settings, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount, void *ref)=nullptr)
 Start to receive I2S data.
 
+bool beginReadWriteDMA (I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount, void *)=nullptr, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount, void *)=nullptr)
 Start to receive and transmit I2S data.
 
+void end ()
 
size_t write (const uint8_t *data, size_t bytes)
 Write method which needs to be called when ansync mode is disabled. More...
 
size_t readBytes (uint8_t *data, size_t bytes)
 Read method which needs to be called when ansync mode is disabled. More...
 
+ + @@ -160,12 +173,12 @@ - - - - + + + + @@ -175,6 +188,9 @@ + +

Protected Member Functions

+int getBytes ()
 
void cb_TxRxComplete (I2S_HandleTypeDef *hi2s)
 Callback for double buffer. More...
 
byte * dma_buffer_rx = nullptr
 
-void(* readToTransmitCB )(uint8_t *buffer, uint16_t byteCount)
 
-void(* writeFromReceiveCB )(uint8_t *buffer, uint16_t byteCount)
 
+void(* readToTransmitCB )(uint8_t *buffer, uint16_t byteCount, void *ref)
 
+void(* writeFromReceiveCB )(uint8_t *buffer, uint16_t byteCount, void *ref)
 
DMA_HandleTypeDef hdma_i2s3_ext_rx
 
HardwareConfig hw
 
+bool use_dma = false
 
@@ -316,8 +332,7 @@

Parameters

Friends

- +
hi2s
-
hi2s
@@ -351,8 +366,7 @@

Parameters
- +
hi2s
-
hi2s
@@ -464,6 +478,98 @@

+

◆ readBytes()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
size_t stm32_i2s::Stm32I2sClass::readBytes (uint8_t * data,
size_t bytes 
)
+ 		+inline
+
+ +

Read method which needs to be called when ansync mode is disabled.

+
Parameters
+ + + +
data
bytes
+
+
+
Returns
+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
size_t stm32_i2s::Stm32I2sClass::write (const uint8_t * data,
size_t bytes 
)
+ 		+inline
+
+ +

Write method which needs to be called when ansync mode is disabled.

+
Parameters
+ + + +
data
bytes
+
+
+
Returns
+
The documentation for this class was generated from the following file:
    diff --git a/docs/html/functions.html b/docs/html/functions.html index e53d0b2..b53919d 100644 --- a/docs/html/functions.html +++ b/docs/html/functions.html @@ -62,6 +62,18 @@
    Here is a list of all documented class members with links to the class documentation for each member:
    diff --git a/docs/html/functions_func.html b/docs/html/functions_func.html index 477c6db..04f5571 100644 --- a/docs/html/functions_func.html +++ b/docs/html/functions_func.html @@ -62,6 +62,18 @@
     
    diff --git a/docs/html/search/all_1.js b/docs/html/search/all_1.js index c62c4e1..08b4c68 100644 --- a/docs/html/search/all_1.js +++ b/docs/html/search/all_1.js @@ -1,11 +1,7 @@ var searchData= [ - ['cb_5fdmairqrx_1',['cb_dmaIrqRx',['../classstm32__i2s_1_1_stm32_i2s_class.html#ad8d19f61eff465692845d405fd321271',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fdmairqtx_2',['cb_dmaIrqTx',['../classstm32__i2s_1_1_stm32_i2s_class.html#a8f61f957a528292152ac3aa494d6c8f7',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fhal_5fi2s_5fmspdeinit_3',['cb_HAL_I2S_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a368840768f5316846efbcfc7bfbe72da',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fhal_5fi2s_5fmspinit_4',['cb_HAL_I2S_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa6c222c37988e17de110bcee25a16040',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fi2s_5fmspdeinit_5',['cb_i2s_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa17f0e247e1fd708dd6b26dc2a480abe',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fi2s_5fmspinit_6',['cb_i2s_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a568cbd430035151c964c90860711fd2b',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5ftxrxcomplete_7',['cb_TxRxComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#a80d0a01ef377e25ab9e819240d9acb8d',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5ftxrxhalfcomplete_8',['cb_TxRxHalfComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa68f9f957ef9dcf6022da95cc999b45d',1,'stm32_i2s::Stm32I2sClass']]] + ['begin_1',['begin',['../classstm32__i2s_1_1_stm32_i2s_class.html#ab2cdf54a05448b66c5aded8b8a632230',1,'stm32_i2s::Stm32I2sClass']]], + ['beginreaddma_2',['beginReadDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#a0bd110eb19354cfd1317e68b4c74732a',1,'stm32_i2s::Stm32I2sClass']]], + ['beginreadwritedma_3',['beginReadWriteDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#ab5ad88e38c7a426e4c5ab99ee5be6262',1,'stm32_i2s::Stm32I2sClass']]], + ['beginwritedma_4',['beginWriteDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#a184c62a4b0e0b2bfed4c6760aca5b127',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/all_2.js b/docs/html/search/all_2.js index bfed601..d65d262 100644 --- a/docs/html/search/all_2.js +++ b/docs/html/search/all_2.js @@ -1,4 +1,11 @@ var searchData= [ - ['end_9',['end',['../structstm32__i2s_1_1_i2_s_pin.html#a74b9ea065dd62de38da823d2959c4a3a',1,'stm32_i2s::I2SPin']]] + ['cb_5fdmairqrx_5',['cb_dmaIrqRx',['../classstm32__i2s_1_1_stm32_i2s_class.html#ad8d19f61eff465692845d405fd321271',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fdmairqtx_6',['cb_dmaIrqTx',['../classstm32__i2s_1_1_stm32_i2s_class.html#a8f61f957a528292152ac3aa494d6c8f7',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fhal_5fi2s_5fmspdeinit_7',['cb_HAL_I2S_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a368840768f5316846efbcfc7bfbe72da',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fhal_5fi2s_5fmspinit_8',['cb_HAL_I2S_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa6c222c37988e17de110bcee25a16040',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fi2s_5fmspdeinit_9',['cb_i2s_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa17f0e247e1fd708dd6b26dc2a480abe',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fi2s_5fmspinit_10',['cb_i2s_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a568cbd430035151c964c90860711fd2b',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5ftxrxcomplete_11',['cb_TxRxComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#a80d0a01ef377e25ab9e819240d9acb8d',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5ftxrxhalfcomplete_12',['cb_TxRxHalfComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa68f9f957ef9dcf6022da95cc999b45d',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/all_3.js b/docs/html/search/all_3.js index aa98ed3..03ac5ab 100644 --- a/docs/html/search/all_3.js +++ b/docs/html/search/all_3.js @@ -1,5 +1,4 @@ var searchData= [ - ['hal_5fconf_5fextra_2eh_10',['hal_conf_extra.h',['../hal__conf__extra_8h.html',1,'']]], - ['hardwareconfig_11',['HardwareConfig',['../structstm32__i2s_1_1_hardware_config.html',1,'stm32_i2s']]] + ['end_13',['end',['../structstm32__i2s_1_1_i2_s_pin.html#a74b9ea065dd62de38da823d2959c4a3a',1,'stm32_i2s::I2SPin']]] ]; diff --git a/docs/html/search/all_4.js b/docs/html/search/all_4.js index d38ee0d..04af615 100644 --- a/docs/html/search/all_4.js +++ b/docs/html/search/all_4.js @@ -1,7 +1,5 @@ var searchData= [ - ['i2s_5fbegin_12',['i2s_begin',['../classstm32__i2s_1_1_stm32_i2s_class.html#abc045de6c4c440593e3bb6ba0cf9921c',1,'stm32_i2s::Stm32I2sClass']]], - ['i2spin_13',['I2SPin',['../structstm32__i2s_1_1_i2_s_pin.html',1,'stm32_i2s']]], - ['i2spinfunction_14',['I2SPinFunction',['../stm32-i2s_8h.html#a44498895f4b65c359a7e5846c7c16053',1,'stm32_i2s']]], - ['i2ssettingsstm32_15',['I2SSettingsSTM32',['../structstm32__i2s_1_1_i2_s_settings_s_t_m32.html',1,'stm32_i2s']]] + ['hal_5fconf_5fextra_2eh_14',['hal_conf_extra.h',['../hal__conf__extra_8h.html',1,'']]], + ['hardwareconfig_15',['HardwareConfig',['../structstm32__i2s_1_1_hardware_config.html',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/all_5.js b/docs/html/search/all_5.js index 2869865..4749165 100644 --- a/docs/html/search/all_5.js +++ b/docs/html/search/all_5.js @@ -1,6 +1,8 @@ var searchData= [ - ['mx_5fdma_5finit_16',['MX_DMA_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a920ca6270f2a640e010f9a73f9805fba',1,'stm32_i2s::Stm32I2sClass']]], - ['mx_5fgpio_5finit_17',['MX_GPIO_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a7ea0054cb5a28db73d516bd9f12efe5a',1,'stm32_i2s::Stm32I2sClass']]], - ['mx_5fi2s3_5finit_18',['MX_I2S3_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a0b22eaee894545e639e40215fc411706',1,'stm32_i2s::Stm32I2sClass']]] + ['i2s_16',['I2S',['../stm32-i2s_8h.html#ac0af7d21820a3022884016c397fc2401',1,'stm32_i2s']]], + ['i2s_5fbegin_17',['i2s_begin',['../classstm32__i2s_1_1_stm32_i2s_class.html#abc045de6c4c440593e3bb6ba0cf9921c',1,'stm32_i2s::Stm32I2sClass']]], + ['i2spin_18',['I2SPin',['../structstm32__i2s_1_1_i2_s_pin.html',1,'stm32_i2s']]], + ['i2spinfunction_19',['I2SPinFunction',['../stm32-i2s_8h.html#a44498895f4b65c359a7e5846c7c16053',1,'stm32_i2s']]], + ['i2ssettingsstm32_20',['I2SSettingsSTM32',['../structstm32__i2s_1_1_i2_s_settings_s_t_m32.html',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/all_6.js b/docs/html/search/all_6.js index 97684ad..85256ed 100644 --- a/docs/html/search/all_6.js +++ b/docs/html/search/all_6.js @@ -1,10 +1,6 @@ var searchData= [ - ['setupdma_19',['setupDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#aca5c1d70fd7e9a3f3aa0388749b6cb44',1,'stm32_i2s::Stm32I2sClass']]], - ['starti2sreceive_20',['startI2SReceive',['../classstm32__i2s_1_1_stm32_i2s_class.html#afa0743706fbe309e2fca3a8aea2b1a0c',1,'stm32_i2s::Stm32I2sClass']]], - ['starti2stransmit_21',['startI2STransmit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa6106141afdf1742633d9db276432344',1,'stm32_i2s::Stm32I2sClass']]], - ['starti2stransmitreceive_22',['startI2STransmitReceive',['../classstm32__i2s_1_1_stm32_i2s_class.html#a1fb497436e1c2f73b7db59ed65c29d44',1,'stm32_i2s::Stm32I2sClass']]], - ['stm32_2di2s_2eh_23',['stm32-i2s.h',['../stm32-i2s_8h.html',1,'']]], - ['stm32_5fi2s_24',['STM32_I2S',['../stm32-i2s_8h.html#ae6b708354be533711f9512f84b0b3785',1,'stm32_i2s']]], - ['stm32i2sclass_25',['Stm32I2sClass',['../classstm32__i2s_1_1_stm32_i2s_class.html',1,'stm32_i2s']]] + ['mx_5fdma_5finit_21',['MX_DMA_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a920ca6270f2a640e010f9a73f9805fba',1,'stm32_i2s::Stm32I2sClass']]], + ['mx_5fgpio_5finit_22',['MX_GPIO_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a7ea0054cb5a28db73d516bd9f12efe5a',1,'stm32_i2s::Stm32I2sClass']]], + ['mx_5fi2s3_5finit_23',['MX_I2S3_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a0b22eaee894545e639e40215fc411706',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/all_7.js b/docs/html/search/all_7.js index ae74654..27267de 100644 --- a/docs/html/search/all_7.js +++ b/docs/html/search/all_7.js @@ -1,6 +1,4 @@ var searchData= [ - ['main_2ec_44',['main.c',['../main_8c.html',1,'']]], - ['main_2eh_45',['main.h',['../main_8h.html',1,'']]], - ['memmanage_5fhandler_46',['MemManage_Handler',['../stm32f4xx__it_8c.html#a3150f74512510287a942624aa9b44cc5',1,'MemManage_Handler(void): stm32f4xx_it.c'],['../stm32f4xx__it_8h.html#a3150f74512510287a942624aa9b44cc5',1,'MemManage_Handler(void): stm32f4xx_it.c']]] + ['readbytes_24',['readBytes',['../classstm32__i2s_1_1_stm32_i2s_class.html#a95c8ee5b3e293c9d4f553be2897a6cbb',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/all_8.js b/docs/html/search/all_8.js index 27ea40d..8bd7e02 100644 --- a/docs/html/search/all_8.js +++ b/docs/html/search/all_8.js @@ -1,4 +1,6 @@ var searchData= [ - ['nmi_5fhandler_47',['NMI_Handler',['../stm32f4xx__it_8c.html#a6ad7a5e3ee69cb6db6a6b9111ba898bc',1,'NMI_Handler(void): stm32f4xx_it.c'],['../stm32f4xx__it_8h.html#a6ad7a5e3ee69cb6db6a6b9111ba898bc',1,'NMI_Handler(void): stm32f4xx_it.c']]] + ['setupdma_25',['setupDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#aca5c1d70fd7e9a3f3aa0388749b6cb44',1,'stm32_i2s::Stm32I2sClass']]], + ['stm32_2di2s_2eh_26',['stm32-i2s.h',['../stm32-i2s_8h.html',1,'']]], + ['stm32i2sclass_27',['Stm32I2sClass',['../classstm32__i2s_1_1_stm32_i2s_class.html',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/all_9.js b/docs/html/search/all_9.js index fa9157d..bfa5065 100644 --- a/docs/html/search/all_9.js +++ b/docs/html/search/all_9.js @@ -1,4 +1,4 @@ var searchData= [ - ['pendsv_5fhandler_48',['PendSV_Handler',['../stm32f4xx__it_8c.html#a6303e1f258cbdc1f970ce579cc015623',1,'PendSV_Handler(void): stm32f4xx_it.c'],['../stm32f4xx__it_8h.html#a6303e1f258cbdc1f970ce579cc015623',1,'PendSV_Handler(void): stm32f4xx_it.c']]] + ['write_28',['write',['../classstm32__i2s_1_1_stm32_i2s_class.html#a1d8a05bc02fc2d184b9dc22376dc9cc7',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/classes_0.js b/docs/html/search/classes_0.js index 268c1cb..c1fe1d5 100644 --- a/docs/html/search/classes_0.js +++ b/docs/html/search/classes_0.js @@ -1,4 +1,4 @@ var searchData= [ - ['hardwareconfig_26',['HardwareConfig',['../structstm32__i2s_1_1_hardware_config.html',1,'stm32_i2s']]] + ['hardwareconfig_29',['HardwareConfig',['../structstm32__i2s_1_1_hardware_config.html',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/classes_1.js b/docs/html/search/classes_1.js index 050a6bb..a7fb3ba 100644 --- a/docs/html/search/classes_1.js +++ b/docs/html/search/classes_1.js @@ -1,5 +1,5 @@ var searchData= [ - ['i2spin_27',['I2SPin',['../structstm32__i2s_1_1_i2_s_pin.html',1,'stm32_i2s']]], - ['i2ssettingsstm32_28',['I2SSettingsSTM32',['../structstm32__i2s_1_1_i2_s_settings_s_t_m32.html',1,'stm32_i2s']]] + ['i2spin_30',['I2SPin',['../structstm32__i2s_1_1_i2_s_pin.html',1,'stm32_i2s']]], + ['i2ssettingsstm32_31',['I2SSettingsSTM32',['../structstm32__i2s_1_1_i2_s_settings_s_t_m32.html',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/classes_2.js b/docs/html/search/classes_2.js index 6855a6c..31f4ed0 100644 --- a/docs/html/search/classes_2.js +++ b/docs/html/search/classes_2.js @@ -1,4 +1,4 @@ var searchData= [ - ['stm32i2sclass_29',['Stm32I2sClass',['../classstm32__i2s_1_1_stm32_i2s_class.html',1,'stm32_i2s']]] + ['stm32i2sclass_32',['Stm32I2sClass',['../classstm32__i2s_1_1_stm32_i2s_class.html',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/enums_0.js b/docs/html/search/enums_0.js index 4898ba6..e3d1bdf 100644 --- a/docs/html/search/enums_0.js +++ b/docs/html/search/enums_0.js @@ -1,4 +1,4 @@ var searchData= [ - ['i2spinfunction_50',['I2SPinFunction',['../stm32-i2s_8h.html#a44498895f4b65c359a7e5846c7c16053',1,'stm32_i2s']]] + ['i2spinfunction_56',['I2SPinFunction',['../stm32-i2s_8h.html#a44498895f4b65c359a7e5846c7c16053',1,'stm32_i2s']]] ]; diff --git a/docs/html/search/files_0.js b/docs/html/search/files_0.js index a8e8bf3..ef4ae6a 100644 --- a/docs/html/search/files_0.js +++ b/docs/html/search/files_0.js @@ -1,4 +1,4 @@ var searchData= [ - ['hal_5fconf_5fextra_2eh_30',['hal_conf_extra.h',['../hal__conf__extra_8h.html',1,'']]] + ['hal_5fconf_5fextra_2eh_33',['hal_conf_extra.h',['../hal__conf__extra_8h.html',1,'']]] ]; diff --git a/docs/html/search/files_1.js b/docs/html/search/files_1.js index 39bee3b..e192ab6 100644 --- a/docs/html/search/files_1.js +++ b/docs/html/search/files_1.js @@ -1,4 +1,4 @@ var searchData= [ - ['stm32_2di2s_2eh_31',['stm32-i2s.h',['../stm32-i2s_8h.html',1,'']]] + ['stm32_2di2s_2eh_34',['stm32-i2s.h',['../stm32-i2s_8h.html',1,'']]] ]; diff --git a/docs/html/search/functions_0.js b/docs/html/search/functions_0.js index d6a8791..ca0437e 100644 --- a/docs/html/search/functions_0.js +++ b/docs/html/search/functions_0.js @@ -1,11 +1,7 @@ var searchData= [ - ['cb_5fdmairqrx_32',['cb_dmaIrqRx',['../classstm32__i2s_1_1_stm32_i2s_class.html#ad8d19f61eff465692845d405fd321271',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fdmairqtx_33',['cb_dmaIrqTx',['../classstm32__i2s_1_1_stm32_i2s_class.html#a8f61f957a528292152ac3aa494d6c8f7',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fhal_5fi2s_5fmspdeinit_34',['cb_HAL_I2S_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a368840768f5316846efbcfc7bfbe72da',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fhal_5fi2s_5fmspinit_35',['cb_HAL_I2S_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa6c222c37988e17de110bcee25a16040',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fi2s_5fmspdeinit_36',['cb_i2s_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa17f0e247e1fd708dd6b26dc2a480abe',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5fi2s_5fmspinit_37',['cb_i2s_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a568cbd430035151c964c90860711fd2b',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5ftxrxcomplete_38',['cb_TxRxComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#a80d0a01ef377e25ab9e819240d9acb8d',1,'stm32_i2s::Stm32I2sClass']]], - ['cb_5ftxrxhalfcomplete_39',['cb_TxRxHalfComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa68f9f957ef9dcf6022da95cc999b45d',1,'stm32_i2s::Stm32I2sClass']]] + ['begin_35',['begin',['../classstm32__i2s_1_1_stm32_i2s_class.html#ab2cdf54a05448b66c5aded8b8a632230',1,'stm32_i2s::Stm32I2sClass']]], + ['beginreaddma_36',['beginReadDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#a0bd110eb19354cfd1317e68b4c74732a',1,'stm32_i2s::Stm32I2sClass']]], + ['beginreadwritedma_37',['beginReadWriteDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#ab5ad88e38c7a426e4c5ab99ee5be6262',1,'stm32_i2s::Stm32I2sClass']]], + ['beginwritedma_38',['beginWriteDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#a184c62a4b0e0b2bfed4c6760aca5b127',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/functions_1.js b/docs/html/search/functions_1.js index 3385c33..5b1c31c 100644 --- a/docs/html/search/functions_1.js +++ b/docs/html/search/functions_1.js @@ -1,4 +1,11 @@ var searchData= [ - ['end_40',['end',['../structstm32__i2s_1_1_i2_s_pin.html#a74b9ea065dd62de38da823d2959c4a3a',1,'stm32_i2s::I2SPin']]] + ['cb_5fdmairqrx_39',['cb_dmaIrqRx',['../classstm32__i2s_1_1_stm32_i2s_class.html#ad8d19f61eff465692845d405fd321271',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fdmairqtx_40',['cb_dmaIrqTx',['../classstm32__i2s_1_1_stm32_i2s_class.html#a8f61f957a528292152ac3aa494d6c8f7',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fhal_5fi2s_5fmspdeinit_41',['cb_HAL_I2S_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a368840768f5316846efbcfc7bfbe72da',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fhal_5fi2s_5fmspinit_42',['cb_HAL_I2S_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa6c222c37988e17de110bcee25a16040',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fi2s_5fmspdeinit_43',['cb_i2s_MspDeInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa17f0e247e1fd708dd6b26dc2a480abe',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5fi2s_5fmspinit_44',['cb_i2s_MspInit',['../classstm32__i2s_1_1_stm32_i2s_class.html#a568cbd430035151c964c90860711fd2b',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5ftxrxcomplete_45',['cb_TxRxComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#a80d0a01ef377e25ab9e819240d9acb8d',1,'stm32_i2s::Stm32I2sClass']]], + ['cb_5ftxrxhalfcomplete_46',['cb_TxRxHalfComplete',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa68f9f957ef9dcf6022da95cc999b45d',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/functions_2.js b/docs/html/search/functions_2.js index dd9c9c3..4a24301 100644 --- a/docs/html/search/functions_2.js +++ b/docs/html/search/functions_2.js @@ -1,4 +1,4 @@ var searchData= [ - ['i2s_5fbegin_41',['i2s_begin',['../classstm32__i2s_1_1_stm32_i2s_class.html#abc045de6c4c440593e3bb6ba0cf9921c',1,'stm32_i2s::Stm32I2sClass']]] + ['end_47',['end',['../structstm32__i2s_1_1_i2_s_pin.html#a74b9ea065dd62de38da823d2959c4a3a',1,'stm32_i2s::I2SPin']]] ]; diff --git a/docs/html/search/functions_3.js b/docs/html/search/functions_3.js index 249e139..294f280 100644 --- a/docs/html/search/functions_3.js +++ b/docs/html/search/functions_3.js @@ -1,6 +1,4 @@ var searchData= [ - ['mx_5fdma_5finit_42',['MX_DMA_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a920ca6270f2a640e010f9a73f9805fba',1,'stm32_i2s::Stm32I2sClass']]], - ['mx_5fgpio_5finit_43',['MX_GPIO_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a7ea0054cb5a28db73d516bd9f12efe5a',1,'stm32_i2s::Stm32I2sClass']]], - ['mx_5fi2s3_5finit_44',['MX_I2S3_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a0b22eaee894545e639e40215fc411706',1,'stm32_i2s::Stm32I2sClass']]] + ['i2s_5fbegin_48',['i2s_begin',['../classstm32__i2s_1_1_stm32_i2s_class.html#abc045de6c4c440593e3bb6ba0cf9921c',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/functions_4.js b/docs/html/search/functions_4.js index 89bf52e..1974dd5 100644 --- a/docs/html/search/functions_4.js +++ b/docs/html/search/functions_4.js @@ -1,7 +1,6 @@ var searchData= [ - ['setupdma_45',['setupDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#aca5c1d70fd7e9a3f3aa0388749b6cb44',1,'stm32_i2s::Stm32I2sClass']]], - ['starti2sreceive_46',['startI2SReceive',['../classstm32__i2s_1_1_stm32_i2s_class.html#afa0743706fbe309e2fca3a8aea2b1a0c',1,'stm32_i2s::Stm32I2sClass']]], - ['starti2stransmit_47',['startI2STransmit',['../classstm32__i2s_1_1_stm32_i2s_class.html#aa6106141afdf1742633d9db276432344',1,'stm32_i2s::Stm32I2sClass']]], - ['starti2stransmitreceive_48',['startI2STransmitReceive',['../classstm32__i2s_1_1_stm32_i2s_class.html#a1fb497436e1c2f73b7db59ed65c29d44',1,'stm32_i2s::Stm32I2sClass']]] + ['mx_5fdma_5finit_49',['MX_DMA_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a920ca6270f2a640e010f9a73f9805fba',1,'stm32_i2s::Stm32I2sClass']]], + ['mx_5fgpio_5finit_50',['MX_GPIO_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a7ea0054cb5a28db73d516bd9f12efe5a',1,'stm32_i2s::Stm32I2sClass']]], + ['mx_5fi2s3_5finit_51',['MX_I2S3_Init',['../classstm32__i2s_1_1_stm32_i2s_class.html#a0b22eaee894545e639e40215fc411706',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/functions_5.js b/docs/html/search/functions_5.js index 1203798..ff5bd69 100644 --- a/docs/html/search/functions_5.js +++ b/docs/html/search/functions_5.js @@ -1,4 +1,4 @@ var searchData= [ - ['i2s_5fbegin_87',['i2s_begin',['../main_8c.html#aecf051d1328a5ea8ac5b8e64427a1cfd',1,'main.c']]] + ['readbytes_52',['readBytes',['../classstm32__i2s_1_1_stm32_i2s_class.html#a95c8ee5b3e293c9d4f553be2897a6cbb',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/functions_6.js b/docs/html/search/functions_6.js index 17d81f3..827eeee 100644 --- a/docs/html/search/functions_6.js +++ b/docs/html/search/functions_6.js @@ -1,4 +1,4 @@ var searchData= [ - ['memmanage_5fhandler_88',['MemManage_Handler',['../stm32f4xx__it_8c.html#a3150f74512510287a942624aa9b44cc5',1,'MemManage_Handler(void): stm32f4xx_it.c'],['../stm32f4xx__it_8h.html#a3150f74512510287a942624aa9b44cc5',1,'MemManage_Handler(void): stm32f4xx_it.c']]] + ['setupdma_53',['setupDMA',['../classstm32__i2s_1_1_stm32_i2s_class.html#aca5c1d70fd7e9a3f3aa0388749b6cb44',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/functions_7.js b/docs/html/search/functions_7.js index b826793..f8f6ad2 100644 --- a/docs/html/search/functions_7.js +++ b/docs/html/search/functions_7.js @@ -1,4 +1,4 @@ var searchData= [ - ['nmi_5fhandler_89',['NMI_Handler',['../stm32f4xx__it_8c.html#a6ad7a5e3ee69cb6db6a6b9111ba898bc',1,'NMI_Handler(void): stm32f4xx_it.c'],['../stm32f4xx__it_8h.html#a6ad7a5e3ee69cb6db6a6b9111ba898bc',1,'NMI_Handler(void): stm32f4xx_it.c']]] + ['write_54',['write',['../classstm32__i2s_1_1_stm32_i2s_class.html#a1d8a05bc02fc2d184b9dc22376dc9cc7',1,'stm32_i2s::Stm32I2sClass']]] ]; diff --git a/docs/html/search/pages_0.js b/docs/html/search/pages_0.js index 8137b78..63eb9c6 100644 --- a/docs/html/search/pages_0.js +++ b/docs/html/search/pages_0.js @@ -1,4 +1,4 @@ var searchData= [ - ['arduino_20stm32f411_20i2s_20library_51',['Arduino STM32F411 I2S Library',['../index.html',1,'']]] + ['arduino_20stm32f411_20i2s_20library_57',['Arduino STM32F411 I2S Library',['../index.html',1,'']]] ]; diff --git a/docs/html/search/searchdata.js b/docs/html/search/searchdata.js index e4b26be..691857b 100644 --- a/docs/html/search/searchdata.js +++ b/docs/html/search/searchdata.js @@ -1,10 +1,10 @@ var indexSectionsWithContent = { - 0: "acehims", + 0: "abcehimrsw", 1: "his", 2: "hs", - 3: "ceims", - 4: "s", + 3: "bceimrsw", + 4: "i", 5: "i", 6: "a" }; diff --git a/docs/html/search/variables_0.js b/docs/html/search/variables_0.js index 8031c54..06af9cb 100644 --- a/docs/html/search/variables_0.js +++ b/docs/html/search/variables_0.js @@ -1,4 +1,4 @@ var searchData= [ - ['stm32_5fi2s_49',['STM32_I2S',['../stm32-i2s_8h.html#ae6b708354be533711f9512f84b0b3785',1,'stm32_i2s']]] + ['i2s_55',['I2S',['../stm32-i2s_8h.html#ac0af7d21820a3022884016c397fc2401',1,'stm32_i2s']]] ]; diff --git a/docs/html/stm32-config-i2s_8h_source.html b/docs/html/stm32-config-i2s_8h_source.html index 73438d2..b09233a 100644 --- a/docs/html/stm32-config-i2s_8h_source.html +++ b/docs/html/stm32-config-i2s_8h_source.html @@ -85,26 +85,28 @@
    14  {data_out, PB_4, GPIO_AF7_I2S3ext},\
    15  {data_in, PB_5, GPIO_AF6_SPI3},\
    16  }
    -
    17  #define PLLN 192
    +
    17 // 8 MHz / M * N / R => I2S Freq
    18  #define PLLM 16
    -
    19  #define PLLR 2
    -
    20 #endif
    -
    21 
    -
    22 #ifdef ARDUINO_GENERIC_F411VETX
    -
    23  #define SPI_INSTANCE_FOR_I2S SPI3
    -
    24  #define STM_I2S_PINS \
    -
    25  { \
    -
    26  {mclk, PC_7, GPIO_AF6_SPI3},\
    -
    27  {bck, PC_10, GPIO_AF6_SPI3},\
    -
    28  {ws, PA_4, GPIO_AF6_SPI3},\
    -
    29  {data_out, PC_12, GPIO_AF6_SPI3},\
    -
    30  {data_in, PC_3, GPIO_AF6_SPI3}\
    -
    31  };
    -
    32  #define PLLN 200
    -
    33  #define PLLM 5
    -
    34  #define PLLR 2
    -
    35 #endif
    -
    36 
    +
    19  #define PLLN 192
    +
    20  #define PLLR 2
    +
    21 #endif
    +
    22 
    +
    23 #ifdef ARDUINO_GENERIC_F411VETX
    +
    24  #define SPI_INSTANCE_FOR_I2S SPI3
    +
    25  #define STM_I2S_PINS \
    +
    26  { \
    +
    27  {mclk, PC_7, GPIO_AF6_SPI3},\
    +
    28  {bck, PC_10, GPIO_AF6_SPI3},\
    +
    29  {ws, PA_4, GPIO_AF6_SPI3},\
    +
    30  {data_out, PC_12, GPIO_AF6_SPI3},\
    +
    31  {data_in, PC_3, GPIO_AF6_SPI3}\
    +
    32  };
    +
    33 // 8 MHz / M * N / R => I2S Freq
    +
    34  #define PLLM 16
    +
    35  #define PLLN 100
    +
    36  #define PLLR 2
    +
    37 #endif
    +
    38 
    diff --git a/docs/html/stm32-i2s_8h.html b/docs/html/stm32-i2s_8h.html index 7854c4b..f74b2b7 100644 --- a/docs/html/stm32-i2s_8h.html +++ b/docs/html/stm32-i2s_8h.html @@ -78,17 +78,17 @@

    Main entry point header for this library. More...

    -
    #include "Arduino.h"
    -#include "stm32-config-i2s.h"
    -#include "stm32f4xx_hal.h"
    -#include <assert.h>
    +
    #include <assert.h>
    #include <stdarg.h>
    #include <stdbool.h>
    #include <stdint.h>
    #include <stdio.h>
    #include <stdlib.h>
    #include <string.h>
    +#include "Arduino.h"
    #include "PinConfigured.h"
    +#include "stm32-config-i2s.h"
    +#include "stm32f4xx_hal.h"

    Go to the source code of this file.

    @@ -168,10 +168,10 @@ - - - + + +
    bool stm32_i2s::stm32_i2s_is_error
     
    -Stm32I2sClass stm32_i2s::STM32_I2S
     Global I2S Object.
     
    +Stm32I2sClass stm32_i2s::I2S
     Global I2S Object.
     

    Detailed Description

    Main entry point header for this library.

    diff --git a/docs/html/stm32-i2s_8h_source.html b/docs/html/stm32-i2s_8h_source.html index 17552e3..2a7d231 100644 --- a/docs/html/stm32-i2s_8h_source.html +++ b/docs/html/stm32-i2s_8h_source.html @@ -72,18 +72,18 @@ Go to the documentation of this file.
    1 
    10 #pragma once
    11 
    -
    12 
    -
    13 #include "Arduino.h"
    -
    14 #include "stm32-config-i2s.h"
    -
    15 #include "stm32f4xx_hal.h"
    -
    16 #include <assert.h>
    -
    17 #include <stdarg.h>
    -
    18 #include <stdbool.h>
    -
    19 #include <stdint.h>
    -
    20 #include <stdio.h>
    -
    21 #include <stdlib.h>
    -
    22 #include <string.h>
    -
    23 #include "PinConfigured.h"
    +
    12 #include <assert.h>
    +
    13 #include <stdarg.h>
    +
    14 #include <stdbool.h>
    +
    15 #include <stdint.h>
    +
    16 #include <stdio.h>
    +
    17 #include <stdlib.h>
    +
    18 #include <string.h>
    +
    19 
    +
    20 #include "Arduino.h"
    +
    21 #include "PinConfigured.h"
    +
    22 #include "stm32-config-i2s.h"
    +
    23 #include "stm32f4xx_hal.h"
    24 
    25 extern uint32_t g_anOutputPinConfigured[MAX_NB_PORT];
    26 
    @@ -115,57 +115,57 @@
    60  PinName pin;
    61  int altFunction;
    62 
    -
    63  void begin(){
    +
    63  void begin() {
    64  end();
    65  // define the pin function
    66  pin_function(pin, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, altFunction));
    67  }
    68 
    -
    70  void end(){
    +
    70  void end() {
    71  PinName p = pin;
    72  if (p != NC) {
    73  // If the pin that support PWM or DAC output, we need to turn it off
    -
    74  #if (defined(HAL_DAC_MODULE_ENABLED) && !defined(HAL_DAC_MODULE_ONLY)) ||\
    -
    75  (defined(HAL_TIM_MODULE_ENABLED) && !defined(HAL_TIM_MODULE_ONLY))
    +
    74 #if (defined(HAL_DAC_MODULE_ENABLED) && !defined(HAL_DAC_MODULE_ONLY)) || \
    +
    75  (defined(HAL_TIM_MODULE_ENABLED) && !defined(HAL_TIM_MODULE_ONLY))
    76  if (is_pin_configured(p, g_anOutputPinConfigured)) {
    -
    77  #if defined(HAL_DAC_MODULE_ENABLED) && !defined(HAL_DAC_MODULE_ONLY)
    +
    77 #if defined(HAL_DAC_MODULE_ENABLED) && !defined(HAL_DAC_MODULE_ONLY)
    78  if (pin_in_pinmap(p, PinMap_DAC)) {
    79  dac_stop(p);
    80  } else
    -
    81  #endif //HAL_DAC_MODULE_ENABLED && !HAL_DAC_MODULE_ONLY
    -
    82  #if defined(HAL_TIM_MODULE_ENABLED) && !defined(HAL_TIM_MODULE_ONLY)
    -
    83  if (pin_in_pinmap(p, PinMap_TIM)) {
    -
    84  pwm_stop(p);
    -
    85  }
    -
    86  #endif //HAL_TIM_MODULE_ENABLED && !HAL_TIM_MODULE_ONLY
    -
    87  {
    -
    88  reset_pin_configured(p, g_anOutputPinConfigured);
    -
    89  }
    -
    90  }
    -
    91  #endif
    -
    92  }
    -
    93  }
    -
    94 
    -
    95 
    -
    96 };
    -
    97 
    -
    103 struct HardwareConfig {
    -
    104  IRQn_Type irq1 = DMA1_Stream0_IRQn;
    -
    105  IRQn_Type irq2 = DMA1_Stream5_IRQn;;
    -
    106 
    -
    107  uint32_t plln = PLLN;
    -
    108  uint32_t pllm = PLLM;
    -
    109  uint32_t pllr = PLLR;
    -
    110 
    -
    111  DMA_Stream_TypeDef *rx_instance = DMA1_Stream0;
    -
    112  uint32_t rx_channel = DMA_CHANNEL_3;
    -
    113  uint32_t rx_direction = DMA_PERIPH_TO_MEMORY;
    -
    114 
    -
    115  DMA_Stream_TypeDef *tx_instance = DMA1_Stream5;
    -
    116  uint32_t tx_channel = DMA_CHANNEL_0;
    -
    117  uint32_t tx_direction = DMA_MEMORY_TO_PERIPH;
    +
    81 #endif // HAL_DAC_MODULE_ENABLED && !HAL_DAC_MODULE_ONLY
    +
    82 #if defined(HAL_TIM_MODULE_ENABLED) && !defined(HAL_TIM_MODULE_ONLY)
    +
    83  if (pin_in_pinmap(p, PinMap_TIM)) {
    +
    84  pwm_stop(p);
    +
    85  }
    +
    86 #endif // HAL_TIM_MODULE_ENABLED && !HAL_TIM_MODULE_ONLY
    +
    87  { reset_pin_configured(p, g_anOutputPinConfigured); }
    +
    88  }
    +
    89 #endif
    +
    90  }
    +
    91  }
    +
    92 };
    +
    93 
    +
    99 struct HardwareConfig {
    +
    100  IRQn_Type irq1 = DMA1_Stream0_IRQn;
    +
    101  IRQn_Type irq2 = DMA1_Stream5_IRQn;
    +
    102 
    +
    103 #ifdef PLLM
    +
    104  uint32_t pllm = PLLM;
    +
    105 #endif
    +
    106  uint32_t plln = PLLN;
    +
    107  uint32_t pllr = PLLR;
    +
    108 
    +
    109  DMA_Stream_TypeDef *rx_instance = DMA1_Stream0;
    +
    110  uint32_t rx_channel = DMA_CHANNEL_3;
    +
    111  uint32_t rx_direction = DMA_PERIPH_TO_MEMORY;
    +
    112 
    +
    113  DMA_Stream_TypeDef *tx_instance = DMA1_Stream5;
    +
    114  uint32_t tx_channel = DMA_CHANNEL_0;
    +
    115  uint32_t tx_direction = DMA_MEMORY_TO_PERIPH;
    +
    116 
    +
    117  I2SPin pins[5] = STM_I2S_PINS;
    118 
    -
    119  I2SPin pins[5] = STM_I2S_PINS;
    +
    119  int buffer_size = 512;
    120 
    121  HardwareConfig() {
    122  // overwrite processor specific default settings if necessary
    @@ -177,300 +177,392 @@
    133  uint32_t standard = I2S_STANDARD_PHILIPS;
    134  uint32_t fullduplexmode = I2S_FULLDUPLEXMODE_ENABLE;
    135  uint32_t sample_rate = I2S_AUDIOFREQ_44K;
    -
    136  HardwareConfig hardware_config;
    -
    137 };
    -
    138 
    -
    144 class Stm32I2sClass {
    -
    145  friend void DMA1_Stream0_IRQHandler(void);
    -
    146  friend void DMA1_Stream5_IRQHandler(void);
    -
    147  friend void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
    -
    148  friend void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
    -
    149  friend void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
    -
    150  friend void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
    -
    151  friend void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
    -
    152  friend void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
    -
    153 
    -
    154 public:
    -
    156  bool startI2STransmit(I2SSettingsSTM32 settings,
    -
    157  void (*readToTransmit)(uint8_t *buffer,
    -
    158  uint16_t byteCount),
    -
    159  uint16_t buffer_size) {
    -
    160  this->settings = settings;
    -
    161  this->hw = settings.hardware_config;
    -
    162  readToTransmitCB = readToTransmit;
    -
    163  if (dma_buffer_tx == nullptr)
    -
    164  dma_buffer_tx = new byte[buffer_size];
    -
    165  bool result = true;
    +
    136  uint32_t data_format = I2S_DATAFORMAT_16B;
    +
    137  HardwareConfig hardware_config;
    +
    138  // optioinal reference that will be provided by the callbacks
    +
    139  void *ref = nullptr;
    +
    140 };
    +
    141 
    +
    147 class Stm32I2sClass {
    +
    148  friend void DMA1_Stream0_IRQHandler(void);
    +
    149  friend void DMA1_Stream5_IRQHandler(void);
    +
    150  friend void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
    +
    151  friend void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
    +
    152  friend void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
    +
    153  friend void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
    +
    154  friend void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
    +
    155  friend void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
    +
    156 
    +
    157  public:
    +
    159  bool begin(I2SSettingsSTM32 settings, bool transmit, bool receive) {
    +
    160  this->use_dma = false;
    +
    161  this->settings = settings;
    +
    162  this->hw = settings.hardware_config;
    +
    163  int buffer_size = hw.buffer_size;
    +
    164  bool result = true;
    +
    165 
    166  if (!i2s_begin()) {
    167  return false;
    168  }
    -
    169  // start circular dma
    -
    170  if (HAL_I2S_Transmit_DMA(&hi2s3, (uint16_t *)dma_buffer_tx, buffer_size) !=
    -
    171  HAL_OK) {
    -
    172  STM32_LOG("error HAL_I2S_Transmit_DMA");
    -
    173  Report_Error();
    -
    174  result = false;
    -
    175  }
    -
    176  return result;
    -
    177  }
    -
    178 
    -
    180  bool startI2SReceive(I2SSettingsSTM32 settings,
    -
    181  void (*writeFromReceive)(uint8_t *buffer,
    -
    182  uint16_t byteCount),
    -
    183  uint16_t buffer_size) {
    -
    184  this->settings = settings;
    -
    185  this->hw = settings.hardware_config;
    -
    186  bool result = true;
    -
    187  writeFromReceiveCB = writeFromReceive;
    -
    188  if (dma_buffer_rx == nullptr)
    -
    189  dma_buffer_rx = new byte[buffer_size];
    -
    190  if (!i2s_begin()) {
    -
    191  return false;
    -
    192  }
    -
    193  // start circular dma
    -
    194  if (HAL_I2S_Receive_DMA(&hi2s3, (uint16_t *)dma_buffer_rx, buffer_size) !=
    -
    195  HAL_OK) {
    -
    196  STM32_LOG("error: HAL_I2S_Transmit_DMA");
    -
    197  Report_Error();
    -
    198  result = false;
    -
    199  }
    -
    200  return result;
    -
    201  }
    -
    202 
    -
    204  bool startI2STransmitReceive(I2SSettingsSTM32 settings,
    -
    205  void (*readToTransmit)(uint8_t *buffer,
    -
    206  uint16_t byteCount),
    -
    207  void (*writeFromReceive)(uint8_t *buffer,
    -
    208  uint16_t byteCount),
    -
    209  uint16_t buffer_size) {
    -
    210  this->settings = settings;
    -
    211  this->hw = settings.hardware_config;
    -
    212  bool result = true;
    -
    213  readToTransmitCB = readToTransmit;
    -
    214  writeFromReceiveCB = writeFromReceive;
    -
    215 
    -
    216  if (dma_buffer_tx == nullptr)
    -
    217  dma_buffer_tx = new byte[buffer_size];
    -
    218 
    -
    219  if (dma_buffer_rx == nullptr)
    -
    220  dma_buffer_rx = new byte[buffer_size];
    -
    221 
    -
    222  if (!i2s_begin()) {
    -
    223  return false;
    -
    224  }
    -
    225  if (HAL_I2SEx_TransmitReceive_DMA(&hi2s3, (uint16_t *)dma_buffer_tx,
    -
    226  (uint16_t *)dma_buffer_rx,
    -
    227  buffer_size) != HAL_OK) {
    -
    228  STM32_LOG("error HAL_I2SEx_TransmitReceive_DMA");
    -
    229  Report_Error();
    -
    230  result = false;
    -
    231  }
    -
    232  return result;
    -
    233  }
    -
    234 
    -
    235  void stopI2S() {
    -
    236  HAL_I2S_DMAStop(&hi2s3);
    -
    237  HAL_I2S_DeInit(&hi2s3);
    -
    238  HAL_I2S_MspDeInit(&hi2s3);
    -
    239  if (dma_buffer_tx != NULL) {
    -
    240  delete[](dma_buffer_tx);
    -
    241  }
    -
    242  if (dma_buffer_rx != NULL) {
    -
    243  delete[](dma_buffer_rx);
    -
    244  }
    -
    245  }
    -
    246 
    -
    247 protected:
    -
    248  I2SSettingsSTM32 settings;
    -
    249  I2S_HandleTypeDef hi2s3;
    -
    250  byte *dma_buffer_tx = nullptr;
    -
    251  byte *dma_buffer_rx = nullptr;
    -
    252  void (*readToTransmitCB)(uint8_t *buffer, uint16_t byteCount);
    -
    253  void (*writeFromReceiveCB)(uint8_t *buffer, uint16_t byteCount);
    -
    254  DMA_HandleTypeDef hdma_i2s3_ext_rx;
    -
    255  DMA_HandleTypeDef hdma_i2s3_ext_tx;
    -
    256  HardwareConfig hw;
    -
    257 
    -
    260  void cb_TxRxComplete(I2S_HandleTypeDef *hi2s) {
    -
    261  // second half finished, filling it up again while first half is playing
    -
    262  uint8_t *dma_buffer_tx = (uint8_t *)hi2s->pTxBuffPtr;
    -
    263  uint8_t *dma_buffer_rx = (uint8_t *)hi2s->pRxBuffPtr;
    -
    264  uint16_t buffer_size_tx = hi2s->TxXferSize * 2; // XferSize is in words
    -
    265  uint16_t buffer_size_rx = hi2s->RxXferSize * 2;
    -
    266  if (readToTransmitCB != NULL)
    -
    267  readToTransmitCB(&(dma_buffer_tx[buffer_size_tx / 2]),
    -
    268  buffer_size_tx / 2);
    -
    269  if (writeFromReceiveCB != NULL)
    -
    270  writeFromReceiveCB(&(dma_buffer_rx[buffer_size_rx / 2]),
    -
    271  buffer_size_rx / 2);
    -
    272  }
    +
    169 
    +
    170  if (!transmit && !receive) {
    +
    171  return false;
    +
    172  }
    +
    173 
    +
    174  if (use_dma) {
    +
    175  if (transmit && !receive) {
    +
    176  if (HAL_I2S_Transmit_DMA(&hi2s3, (uint16_t *)dma_buffer_tx,
    +
    177  buffer_size) != HAL_OK) {
    +
    178  STM32_LOG("error HAL_I2S_Transmit_DMA");
    +
    179  Report_Error();
    +
    180  result = false;
    +
    181  }
    +
    182  }
    +
    183 
    +
    184  if (receive && !transmit) {
    +
    185  if (HAL_I2S_Receive_DMA(&hi2s3, (uint16_t *)dma_buffer_rx,
    +
    186  buffer_size) != HAL_OK) {
    +
    187  STM32_LOG("error: HAL_I2S_Receive_DMA");
    +
    188  Report_Error();
    +
    189  result = false;
    +
    190  }
    +
    191  }
    +
    192 
    +
    193  if (receive && transmit) {
    +
    194  if (HAL_I2SEx_TransmitReceive_DMA(&hi2s3, (uint16_t *)dma_buffer_tx,
    +
    195  (uint16_t *)dma_buffer_rx,
    +
    196  buffer_size) != HAL_OK) {
    +
    197  STM32_LOG("error HAL_I2SEx_TransmitReceive_DMA");
    +
    198  Report_Error();
    +
    199  result = false;
    +
    200  }
    +
    201  }
    +
    202  }
    +
    203 
    +
    204  return result;
    +
    205  }
    +
    206 
    +
    208  bool beginWriteDMA(I2SSettingsSTM32 settings,
    +
    209  void (*readToTransmit)(uint8_t *buffer, uint16_t byteCount,
    +
    210  void *ref) = nullptr) {
    +
    211  this->use_dma = true;
    +
    212  this->settings = settings;
    +
    213  this->hw = settings.hardware_config;
    +
    214  int buffer_size = hw.buffer_size;
    +
    215  readToTransmitCB = readToTransmit;
    +
    216  if (dma_buffer_tx == nullptr) dma_buffer_tx = new byte[buffer_size];
    +
    217  bool result = true;
    +
    218  if (!i2s_begin()) {
    +
    219  return false;
    +
    220  }
    +
    221  // start circular dma
    +
    222  if (HAL_I2S_Transmit_DMA(&hi2s3, (uint16_t *)dma_buffer_tx, buffer_size) !=
    +
    223  HAL_OK) {
    +
    224  STM32_LOG("error HAL_I2S_Transmit_DMA");
    +
    225  Report_Error();
    +
    226  result = false;
    +
    227  }
    +
    228  return result;
    +
    229  }
    +
    230 
    +
    232  bool beginReadDMA(I2SSettingsSTM32 settings,
    +
    233  void (*writeFromReceive)(uint8_t *buffer,
    +
    234  uint16_t byteCount,
    +
    235  void *ref) = nullptr) {
    +
    236  this->use_dma = true;
    +
    237  this->settings = settings;
    +
    238  this->hw = settings.hardware_config;
    +
    239  int buffer_size = hw.buffer_size;
    +
    240  bool result = true;
    +
    241  writeFromReceiveCB = writeFromReceive;
    +
    242  if (dma_buffer_rx == nullptr) dma_buffer_rx = new byte[buffer_size];
    +
    243  if (!i2s_begin()) {
    +
    244  return false;
    +
    245  }
    +
    246  // start circular dma
    +
    247  if (HAL_I2S_Receive_DMA(&hi2s3, (uint16_t *)dma_buffer_rx, buffer_size) !=
    +
    248  HAL_OK) {
    +
    249  STM32_LOG("error: HAL_I2S_Transmit_DMA");
    +
    250  Report_Error();
    +
    251  result = false;
    +
    252  }
    +
    253  return result;
    +
    254  }
    +
    255 
    +
    257  bool beginReadWriteDMA(I2SSettingsSTM32 settings,
    +
    258  void (*readToTransmit)(uint8_t *buffer,
    +
    259  uint16_t byteCount,
    +
    260  void *) = nullptr,
    +
    261  void (*writeFromReceive)(uint8_t *buffer,
    +
    262  uint16_t byteCount,
    +
    263  void *) = nullptr) {
    +
    264  this->use_dma = true;
    +
    265  this->settings = settings;
    +
    266  this->hw = settings.hardware_config;
    +
    267  int buffer_size = hw.buffer_size;
    +
    268  bool result = true;
    +
    269  readToTransmitCB = readToTransmit;
    +
    270  writeFromReceiveCB = writeFromReceive;
    +
    271 
    +
    272  if (dma_buffer_tx == nullptr) dma_buffer_tx = new byte[buffer_size];
    273 
    -
    276  void cb_TxRxHalfComplete(I2S_HandleTypeDef *hi2s) {
    -
    277  // second half finished, filling it up again while first half is playing
    -
    278  uint8_t *dma_buffer_tx = (uint8_t *)hi2s->pTxBuffPtr;
    -
    279  uint8_t *dma_buffer_rx = (uint8_t *)hi2s->pRxBuffPtr;
    -
    280  uint16_t buffer_size_tx = hi2s->TxXferSize * 2; // XferSize is in words
    -
    281  uint16_t buffer_size_rx = hi2s->RxXferSize * 2;
    -
    282  if (readToTransmitCB != NULL)
    -
    283  readToTransmitCB(&(dma_buffer_tx[0]), buffer_size_tx / 2);
    -
    284  if (writeFromReceiveCB != NULL)
    -
    285  writeFromReceiveCB(&(dma_buffer_rx[0]), buffer_size_rx / 2);
    -
    286  }
    -
    287 
    -
    289  inline void cb_dmaIrqRx() { HAL_DMA_IRQHandler(&hdma_i2s3_ext_rx); }
    -
    290 
    -
    292  inline void cb_dmaIrqTx() { HAL_DMA_IRQHandler(&hdma_i2s3_ext_tx); }
    -
    293 
    -
    295  inline void cb_HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) { cb_i2s_MspInit(hi2s); }
    -
    296 
    -
    298  inline void cb_HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) { cb_i2s_MspDeInit(hi2s);}
    -
    299 
    -
    301  bool i2s_begin() {
    -
    302  stm32_i2s_is_error = false;
    -
    303  if (settings.sample_rate == 0) {
    -
    304  STM32_LOG("sample_rate must not be 0");
    -
    305  return false;
    -
    306  }
    -
    307  stm32_i2s_is_error = false;
    -
    308  /* Reset of all peripherals, Initializes the Flash interface and the
    -
    309  * Systick.
    -
    310  */
    -
    311  // HAL_Init();// Not needed -> called by Arduino
    -
    312  /* Configure the system clock */
    -
    313  // SystemClock_Config(); // Not needed -> called by Arduino
    -
    314  /* Initialize all configured peripherals */
    -
    315  MX_GPIO_Init();
    -
    316  MX_DMA_Init();
    -
    317  MX_I2S3_Init();
    -
    318  return !stm32_i2s_is_error;
    -
    319  }
    -
    320 
    -
    327  virtual void MX_GPIO_Init(void) {
    -
    328  // GPIO Ports Clock Enable
    -
    329  __HAL_RCC_GPIOH_CLK_ENABLE();
    -
    330 
    -
    331  // Define pins
    -
    332  for (I2SPin &pin : hw.pins) {
    -
    333  pin.begin();
    -
    334  }
    -
    335  }
    -
    336 
    -
    337 
    -
    338 
    -
    342  virtual void MX_DMA_Init(void) {
    -
    343  /* DMA controller clock enable */
    -
    344  __HAL_RCC_DMA1_CLK_ENABLE();
    -
    345 
    -
    346  /* DMA interrupt init */
    -
    347  /* DMA1_Stream0_IRQn interrupt configuration */
    -
    348  HAL_NVIC_SetPriority(hw.irq1, 0, 0);
    -
    349  HAL_NVIC_EnableIRQ(hw.irq1);
    -
    350  /* DMA1_Stream5_IRQn interrupt configuration */
    -
    351  HAL_NVIC_SetPriority(hw.irq2, 0, 0);
    -
    352  HAL_NVIC_EnableIRQ(hw.irq2);
    -
    353  }
    -
    354 
    -
    360  virtual void MX_I2S3_Init(void) {
    -
    361  hi2s3.Instance = SPI_INSTANCE_FOR_I2S;
    -
    362  hi2s3.Init.Mode = settings.mode;
    -
    363  hi2s3.Init.Standard = settings.standard;
    -
    364  hi2s3.Init.FullDuplexMode = settings.fullduplexmode;
    -
    365  hi2s3.Init.AudioFreq = settings.sample_rate;
    -
    366  hi2s3.Init.DataFormat = I2S_DATAFORMAT_16B;
    -
    367  hi2s3.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
    -
    368  hi2s3.Init.CPOL = I2S_CPOL_LOW;
    -
    369  hi2s3.Init.ClockSource = I2S_CLOCK_PLL;
    -
    370  if (HAL_I2S_Init(&hi2s3) != HAL_OK) {
    -
    371  Report_Error();
    -
    372  }
    -
    373  }
    -
    374 
    -
    381  virtual void cb_i2s_MspInit(I2S_HandleTypeDef *hi2s) {
    -
    382  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
    -
    383  if (hi2s->Instance == SPI3) {
    -
    387  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
    -
    388  PeriphClkInitStruct.PLLI2S.PLLI2SN = hw.plln; // 192;
    -
    389 #ifdef PLLM
    -
    390  PeriphClkInitStruct.PLLI2S.PLLI2SM = hw.pllm; // 16;
    -
    391 #endif
    -
    392  PeriphClkInitStruct.PLLI2S.PLLI2SR = hw.pllr; // 2;
    -
    393  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
    -
    394  Report_Error();
    -
    395  }
    -
    396 
    -
    397  /* Peripheral clock enable */
    -
    398  __HAL_RCC_SPI3_CLK_ENABLE();
    -
    399 
    -
    400  /* I2S3 DMA Init */
    -
    401  if (dma_buffer_rx != nullptr) {
    -
    402  setupDMA(hdma_i2s3_ext_rx, hw.rx_instance, hw.rx_channel,
    -
    403  hw.rx_direction);
    -
    404  __HAL_LINKDMA(hi2s, hdmarx, hdma_i2s3_ext_rx);
    -
    405  }
    -
    406 
    -
    407  if (dma_buffer_tx != nullptr) {
    -
    408  setupDMA(hdma_i2s3_ext_tx, hw.tx_instance, hw.tx_channel,
    -
    409  hw.tx_direction);
    -
    410  __HAL_LINKDMA(hi2s, hdmatx, hdma_i2s3_ext_tx);
    -
    411  }
    -
    412  }
    -
    413  }
    -
    414 
    -
    419  void setupDMA(DMA_HandleTypeDef &dma, DMA_Stream_TypeDef *instance,
    -
    420  uint32_t channel, uint32_t direction) {
    -
    421  dma.Instance = instance;
    -
    422  dma.Init.Channel = channel;
    -
    423  dma.Init.Direction = direction;
    -
    424  dma.Init.PeriphInc = DMA_PINC_DISABLE;
    -
    425  dma.Init.MemInc = DMA_MINC_ENABLE;
    -
    426  dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
    -
    427  dma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
    -
    428  dma.Init.Mode = DMA_CIRCULAR;
    -
    429  dma.Init.Priority = DMA_PRIORITY_HIGH;
    -
    430  dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
    -
    431  dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
    -
    432  dma.Init.MemBurst = DMA_PBURST_INC4;
    -
    433  dma.Init.PeriphBurst = DMA_PBURST_INC4;
    -
    434  if (HAL_DMA_Init(&dma) != HAL_OK) {
    -
    435  Report_Error();
    -
    436  }
    -
    437  }
    -
    438 
    -
    445  virtual void cb_i2s_MspDeInit(I2S_HandleTypeDef *hi2s) {
    -
    446  if (hi2s->Instance == SPI3) {
    -
    447  /* Peripheral clock disable */
    -
    448  __HAL_RCC_SPI3_CLK_DISABLE();
    -
    449 
    -
    450  /* I2S3 DMA DeInit */
    -
    451  HAL_DMA_DeInit(hi2s->hdmarx);
    -
    452  HAL_DMA_DeInit(hi2s->hdmatx);
    -
    453  }
    -
    454  }
    -
    455 };
    -
    456 
    -
    458 extern Stm32I2sClass STM32_I2S;
    -
    459 
    -
    460 }
    -
    461 
    -
    stm32_i2s::Stm32I2sClass
    I2S API for STM32.
    Definition: stm32-i2s.h:144
    -
    stm32_i2s::Stm32I2sClass::MX_I2S3_Init
    virtual void MX_I2S3_Init(void)
    I2S3 Initialization Function.
    Definition: stm32-i2s.h:360
    -
    stm32_i2s::Stm32I2sClass::startI2STransmitReceive
    bool startI2STransmitReceive(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount), void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)
    Start to receive and transmit I2S data.
    Definition: stm32-i2s.h:204
    -
    stm32_i2s::Stm32I2sClass::cb_HAL_I2S_MspDeInit
    void cb_HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
    Callback I2S de-intitialization.
    Definition: stm32-i2s.h:298
    -
    stm32_i2s::Stm32I2sClass::cb_i2s_MspInit
    virtual void cb_i2s_MspInit(I2S_HandleTypeDef *hi2s)
    I2S MSP Initialization This function configures the hardware resources used in this example.
    Definition: stm32-i2s.h:381
    -
    stm32_i2s::Stm32I2sClass::MX_GPIO_Init
    virtual void MX_GPIO_Init(void)
    GPIO Initialization Function for I2S pins.
    Definition: stm32-i2s.h:327
    -
    stm32_i2s::Stm32I2sClass::cb_TxRxComplete
    void cb_TxRxComplete(I2S_HandleTypeDef *hi2s)
    Callback for double buffer.
    Definition: stm32-i2s.h:260
    -
    stm32_i2s::Stm32I2sClass::cb_dmaIrqTx
    void cb_dmaIrqTx()
    Callback for DMA interrupt request.
    Definition: stm32-i2s.h:292
    -
    stm32_i2s::Stm32I2sClass::MX_DMA_Init
    virtual void MX_DMA_Init(void)
    Definition: stm32-i2s.h:342
    -
    stm32_i2s::Stm32I2sClass::cb_i2s_MspDeInit
    virtual void cb_i2s_MspDeInit(I2S_HandleTypeDef *hi2s)
    I2S MSP De-Initialization This function freeze the hardware resources used in this example.
    Definition: stm32-i2s.h:445
    -
    stm32_i2s::Stm32I2sClass::startI2STransmit
    bool startI2STransmit(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)
    Start to transmit I2S data.
    Definition: stm32-i2s.h:156
    -
    stm32_i2s::Stm32I2sClass::cb_TxRxHalfComplete
    void cb_TxRxHalfComplete(I2S_HandleTypeDef *hi2s)
    Callback for double buffer.
    Definition: stm32-i2s.h:276
    -
    stm32_i2s::Stm32I2sClass::cb_HAL_I2S_MspInit
    void cb_HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
    Callback I2S intitialization.
    Definition: stm32-i2s.h:295
    -
    stm32_i2s::Stm32I2sClass::i2s_begin
    bool i2s_begin()
    Starts the i2s processing.
    Definition: stm32-i2s.h:301
    -
    stm32_i2s::Stm32I2sClass::setupDMA
    void setupDMA(DMA_HandleTypeDef &dma, DMA_Stream_TypeDef *instance, uint32_t channel, uint32_t direction)
    DMA Initialization This function configures and initializes the DMA.
    Definition: stm32-i2s.h:419
    -
    stm32_i2s::Stm32I2sClass::cb_dmaIrqRx
    void cb_dmaIrqRx()
    Callback for DMA interrupt request.
    Definition: stm32-i2s.h:289
    -
    stm32_i2s::Stm32I2sClass::startI2SReceive
    bool startI2SReceive(I2SSettingsSTM32 settings, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount), uint16_t buffer_size)
    Start to receive I2S data.
    Definition: stm32-i2s.h:180
    +
    274  if (dma_buffer_rx == nullptr) dma_buffer_rx = new byte[buffer_size];
    +
    275 
    +
    276  if (!i2s_begin()) {
    +
    277  return false;
    +
    278  }
    +
    279  if (HAL_I2SEx_TransmitReceive_DMA(&hi2s3, (uint16_t *)dma_buffer_tx,
    +
    280  (uint16_t *)dma_buffer_rx,
    +
    281  buffer_size) != HAL_OK) {
    +
    282  STM32_LOG("error HAL_I2SEx_TransmitReceive_DMA");
    +
    283  Report_Error();
    +
    284  result = false;
    +
    285  }
    +
    286  return result;
    +
    287  }
    +
    288 
    +
    289  void end() {
    +
    290  if (use_dma) HAL_I2S_DMAStop(&hi2s3);
    +
    291  HAL_I2S_DeInit(&hi2s3);
    +
    292  HAL_I2S_MspDeInit(&hi2s3);
    +
    293  if (dma_buffer_tx != NULL) {
    +
    294  delete[] (dma_buffer_tx);
    +
    295  }
    +
    296  if (dma_buffer_rx != NULL) {
    +
    297  delete[] (dma_buffer_rx);
    +
    298  }
    +
    299  }
    +
    300 
    +
    305  size_t write(const uint8_t *data, size_t bytes) {
    +
    306  HAL_StatusTypeDef rc = HAL_OK;
    +
    307  if (!this->use_dma) {
    +
    308  int samples = bytes / getBytes();
    +
    309  HAL_StatusTypeDef rc =
    +
    310  HAL_I2S_Transmit(&hi2s3, (uint16_t *)data, samples, HAL_MAX_DELAY);
    +
    311  }
    +
    312  return rc == HAL_OK ? bytes : 0;
    +
    313  }
    +
    314 
    +
    319  size_t readBytes(uint8_t *data, size_t bytes) {
    +
    320  HAL_StatusTypeDef rc = HAL_OK;
    +
    321  if (!this->use_dma) {
    +
    322  int samples = bytes / getBytes();
    +
    323  HAL_StatusTypeDef rc =
    +
    324  HAL_I2S_Receive(&hi2s3, (uint16_t *)data, samples, HAL_MAX_DELAY);
    +
    325  }
    +
    326  return rc == HAL_OK ? bytes : 0;
    +
    327  }
    +
    328 
    +
    329  protected:
    +
    330  I2SSettingsSTM32 settings;
    +
    331  I2S_HandleTypeDef hi2s3;
    +
    332  byte *dma_buffer_tx = nullptr;
    +
    333  byte *dma_buffer_rx = nullptr;
    +
    334  void (*readToTransmitCB)(uint8_t *buffer, uint16_t byteCount, void *ref);
    +
    335  void (*writeFromReceiveCB)(uint8_t *buffer, uint16_t byteCount, void *ref);
    +
    336  DMA_HandleTypeDef hdma_i2s3_ext_rx;
    +
    337  DMA_HandleTypeDef hdma_i2s3_ext_tx;
    +
    338  HardwareConfig hw;
    +
    339  bool use_dma = false;
    +
    340 
    +
    341  int getBytes() {
    +
    342  if (settings.data_format == I2S_DATAFORMAT_16B) return 2;
    +
    343  if (settings.data_format == I2S_DATAFORMAT_24B) return 4;
    +
    344  if (settings.data_format == I2S_DATAFORMAT_32B) return 4;
    +
    345  STM32_LOG("unsuppoted data_format");
    +
    346  return 2;
    +
    347  }
    +
    348 
    +
    351  void cb_TxRxComplete(I2S_HandleTypeDef *hi2s) {
    +
    352  // second half finished, filling it up again while first half is playing
    +
    353  uint8_t *dma_buffer_tx = (uint8_t *)hi2s->pTxBuffPtr;
    +
    354  uint8_t *dma_buffer_rx = (uint8_t *)hi2s->pRxBuffPtr;
    +
    355  uint16_t buffer_size_tx = hi2s->TxXferSize * 2; // XferSize is in words
    +
    356  uint16_t buffer_size_rx = hi2s->RxXferSize * 2;
    +
    357  if (readToTransmitCB != NULL)
    +
    358  readToTransmitCB(&(dma_buffer_tx[buffer_size_tx / 2]), buffer_size_tx / 2,
    +
    359  settings.ref);
    +
    360  if (writeFromReceiveCB != NULL)
    +
    361  writeFromReceiveCB(&(dma_buffer_rx[buffer_size_rx / 2]),
    +
    362  buffer_size_rx / 2, settings.ref);
    +
    363  }
    +
    364 
    +
    367  void cb_TxRxHalfComplete(I2S_HandleTypeDef *hi2s) {
    +
    368  // second half finished, filling it up again while first half is playing
    +
    369  uint8_t *dma_buffer_tx = (uint8_t *)hi2s->pTxBuffPtr;
    +
    370  uint8_t *dma_buffer_rx = (uint8_t *)hi2s->pRxBuffPtr;
    +
    371  uint16_t buffer_size_tx = hi2s->TxXferSize * 2; // XferSize is in words
    +
    372  uint16_t buffer_size_rx = hi2s->RxXferSize * 2;
    +
    373  if (readToTransmitCB != NULL)
    +
    374  readToTransmitCB(&(dma_buffer_tx[0]), buffer_size_tx / 2, settings.ref);
    +
    375  if (writeFromReceiveCB != NULL)
    +
    376  writeFromReceiveCB(&(dma_buffer_rx[0]), buffer_size_rx / 2, settings.ref);
    +
    377  }
    +
    378 
    +
    380  inline void cb_dmaIrqRx() { HAL_DMA_IRQHandler(&hdma_i2s3_ext_rx); }
    +
    381 
    +
    383  inline void cb_dmaIrqTx() { HAL_DMA_IRQHandler(&hdma_i2s3_ext_tx); }
    +
    384 
    +
    386  inline void cb_HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) {
    +
    387  cb_i2s_MspInit(hi2s);
    +
    388  }
    +
    389 
    +
    391  inline void cb_HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) {
    +
    392  cb_i2s_MspDeInit(hi2s);
    +
    393  }
    +
    394 
    +
    396  bool i2s_begin() {
    +
    397  stm32_i2s_is_error = false;
    +
    398  if (settings.sample_rate == 0) {
    +
    399  STM32_LOG("sample_rate must not be 0");
    +
    400  return false;
    +
    401  }
    +
    402  STM32_LOG("use_dma: %s", use_dma ? "true" : "false");
    +
    403  stm32_i2s_is_error = false;
    +
    404  /* Reset of all peripherals, Initializes the Flash interface and the
    +
    405  * Systick.
    +
    406  */
    +
    407  // HAL_Init();// Not needed -> called by Arduino
    +
    408  /* Configure the system clock */
    +
    409  // SystemClock_Config(); // Not needed -> called by Arduino
    +
    410  /* Initialize all configured peripherals */
    +
    411  MX_GPIO_Init();
    +
    412  if (use_dma) MX_DMA_Init();
    +
    413  MX_I2S3_Init();
    +
    414  return !stm32_i2s_is_error;
    +
    415  }
    +
    416 
    +
    423  virtual void MX_GPIO_Init(void) {
    +
    424  // GPIO Ports Clock Enable
    +
    425  __HAL_RCC_GPIOH_CLK_ENABLE();
    +
    426 
    +
    427  // Define pins
    +
    428  for (I2SPin &pin : hw.pins) {
    +
    429  pin.begin();
    +
    430  }
    +
    431  }
    +
    432 
    +
    436  virtual void MX_DMA_Init(void) {
    +
    437  /* DMA controller clock enable */
    +
    438  __HAL_RCC_DMA1_CLK_ENABLE();
    +
    439 
    +
    440  /* DMA interrupt init */
    +
    441  /* DMA1_Stream0_IRQn interrupt configuration */
    +
    442  HAL_NVIC_SetPriority(hw.irq1, 0, 0);
    +
    443  HAL_NVIC_EnableIRQ(hw.irq1);
    +
    444  /* DMA1_Stream5_IRQn interrupt configuration */
    +
    445  HAL_NVIC_SetPriority(hw.irq2, 0, 0);
    +
    446  HAL_NVIC_EnableIRQ(hw.irq2);
    +
    447  }
    +
    448 
    +
    454  virtual void MX_I2S3_Init(void) {
    +
    455  hi2s3.Instance = SPI_INSTANCE_FOR_I2S;
    +
    456  hi2s3.Init.Mode = settings.mode;
    +
    457  hi2s3.Init.Standard = settings.standard;
    +
    458  hi2s3.Init.FullDuplexMode = settings.fullduplexmode;
    +
    459  hi2s3.Init.AudioFreq = settings.sample_rate;
    +
    460  hi2s3.Init.DataFormat = settings.data_format;
    +
    461  hi2s3.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
    +
    462  hi2s3.Init.CPOL = I2S_CPOL_LOW;
    +
    463  hi2s3.Init.ClockSource = I2S_CLOCK_PLL;
    +
    464  if (HAL_I2S_Init(&hi2s3) != HAL_OK) {
    +
    465  Report_Error();
    +
    466  }
    +
    467  }
    +
    468 
    +
    475  virtual void cb_i2s_MspInit(I2S_HandleTypeDef *hi2s) {
    +
    476  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
    +
    480  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
    +
    481 #ifdef PLLM
    +
    482  PeriphClkInitStruct.PLLI2S.PLLI2SM = hw.pllm; // 16;
    +
    483 #endif
    +
    484 #ifdef PLLN
    +
    485  PeriphClkInitStruct.PLLI2S.PLLI2SN = hw.plln; // 192;
    +
    486 #endif
    +
    487 #ifdef PLLR
    +
    488  PeriphClkInitStruct.PLLI2S.PLLI2SR = hw.pllr; // 2;
    +
    489 #endif
    +
    490  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
    +
    491  Report_Error();
    +
    492  }
    +
    493 
    +
    494  /* Peripheral clock enable */
    +
    495  __HAL_RCC_SPI3_CLK_ENABLE();
    +
    496 
    +
    497  if (use_dma) {
    +
    498 
    +
    499  /* I2S3 DMA Init */
    +
    500  if (dma_buffer_rx != nullptr) {
    +
    501  setupDMA(hdma_i2s3_ext_rx, hw.rx_instance, hw.rx_channel,
    +
    502  hw.rx_direction);
    +
    503  __HAL_LINKDMA(hi2s, hdmarx, hdma_i2s3_ext_rx);
    +
    504  }
    +
    505 
    +
    506  if (dma_buffer_tx != nullptr) {
    +
    507  setupDMA(hdma_i2s3_ext_tx, hw.tx_instance, hw.tx_channel,
    +
    508  hw.tx_direction);
    +
    509  __HAL_LINKDMA(hi2s, hdmatx, hdma_i2s3_ext_tx);
    +
    510  }
    +
    511  }
    +
    512  }
    +
    513 
    +
    518  void setupDMA(DMA_HandleTypeDef &dma, DMA_Stream_TypeDef *instance,
    +
    519  uint32_t channel, uint32_t direction) {
    +
    520  dma.Instance = instance;
    +
    521  dma.Init.Channel = channel;
    +
    522  dma.Init.Direction = direction;
    +
    523  dma.Init.PeriphInc = DMA_PINC_DISABLE;
    +
    524  dma.Init.MemInc = DMA_MINC_ENABLE;
    +
    525  dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
    +
    526  dma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
    +
    527  dma.Init.Mode = DMA_CIRCULAR;
    +
    528  dma.Init.Priority = DMA_PRIORITY_HIGH;
    +
    529  dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
    +
    530  dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
    +
    531  dma.Init.MemBurst = DMA_PBURST_INC4;
    +
    532  dma.Init.PeriphBurst = DMA_PBURST_INC4;
    +
    533  if (HAL_DMA_Init(&dma) != HAL_OK) {
    +
    534  Report_Error();
    +
    535  }
    +
    536  }
    +
    537 
    +
    544  virtual void cb_i2s_MspDeInit(I2S_HandleTypeDef *hi2s) {
    +
    545  if (hi2s->Instance == SPI3) {
    +
    546  /* Peripheral clock disable */
    +
    547  __HAL_RCC_SPI3_CLK_DISABLE();
    +
    548 
    +
    549  /* I2S3 DMA DeInit */
    +
    550  HAL_DMA_DeInit(hi2s->hdmarx);
    +
    551  HAL_DMA_DeInit(hi2s->hdmatx);
    +
    552  }
    +
    553  }
    +
    554 };
    +
    555 
    +
    557 extern Stm32I2sClass I2S;
    +
    558 
    +
    559 } // namespace stm32_i2s
    +
    stm32_i2s::Stm32I2sClass
    I2S API for STM32.
    Definition: stm32-i2s.h:147
    +
    stm32_i2s::Stm32I2sClass::MX_I2S3_Init
    virtual void MX_I2S3_Init(void)
    I2S3 Initialization Function.
    Definition: stm32-i2s.h:454
    +
    stm32_i2s::Stm32I2sClass::beginReadDMA
    bool beginReadDMA(I2SSettingsSTM32 settings, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount, void *ref)=nullptr)
    Start to receive I2S data.
    Definition: stm32-i2s.h:232
    +
    stm32_i2s::Stm32I2sClass::beginWriteDMA
    bool beginWriteDMA(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount, void *ref)=nullptr)
    Start to transmit I2S data.
    Definition: stm32-i2s.h:208
    +
    stm32_i2s::Stm32I2sClass::write
    size_t write(const uint8_t *data, size_t bytes)
    Write method which needs to be called when ansync mode is disabled.
    Definition: stm32-i2s.h:305
    +
    stm32_i2s::Stm32I2sClass::cb_HAL_I2S_MspDeInit
    void cb_HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
    Callback I2S de-intitialization.
    Definition: stm32-i2s.h:391
    +
    stm32_i2s::Stm32I2sClass::cb_i2s_MspInit
    virtual void cb_i2s_MspInit(I2S_HandleTypeDef *hi2s)
    I2S MSP Initialization This function configures the hardware resources used in this example.
    Definition: stm32-i2s.h:475
    +
    stm32_i2s::Stm32I2sClass::MX_GPIO_Init
    virtual void MX_GPIO_Init(void)
    GPIO Initialization Function for I2S pins.
    Definition: stm32-i2s.h:423
    +
    stm32_i2s::Stm32I2sClass::cb_TxRxComplete
    void cb_TxRxComplete(I2S_HandleTypeDef *hi2s)
    Callback for double buffer.
    Definition: stm32-i2s.h:351
    +
    stm32_i2s::Stm32I2sClass::cb_dmaIrqTx
    void cb_dmaIrqTx()
    Callback for DMA interrupt request.
    Definition: stm32-i2s.h:383
    +
    stm32_i2s::Stm32I2sClass::MX_DMA_Init
    virtual void MX_DMA_Init(void)
    Definition: stm32-i2s.h:436
    +
    stm32_i2s::Stm32I2sClass::readBytes
    size_t readBytes(uint8_t *data, size_t bytes)
    Read method which needs to be called when ansync mode is disabled.
    Definition: stm32-i2s.h:319
    +
    stm32_i2s::Stm32I2sClass::cb_i2s_MspDeInit
    virtual void cb_i2s_MspDeInit(I2S_HandleTypeDef *hi2s)
    I2S MSP De-Initialization This function freeze the hardware resources used in this example.
    Definition: stm32-i2s.h:544
    +
    stm32_i2s::Stm32I2sClass::cb_TxRxHalfComplete
    void cb_TxRxHalfComplete(I2S_HandleTypeDef *hi2s)
    Callback for double buffer.
    Definition: stm32-i2s.h:367
    +
    stm32_i2s::Stm32I2sClass::cb_HAL_I2S_MspInit
    void cb_HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
    Callback I2S intitialization.
    Definition: stm32-i2s.h:386
    +
    stm32_i2s::Stm32I2sClass::begin
    bool begin(I2SSettingsSTM32 settings, bool transmit, bool receive)
    start I2S w/o DMA: use write and readBytes
    Definition: stm32-i2s.h:159
    +
    stm32_i2s::Stm32I2sClass::beginReadWriteDMA
    bool beginReadWriteDMA(I2SSettingsSTM32 settings, void(*readToTransmit)(uint8_t *buffer, uint16_t byteCount, void *)=nullptr, void(*writeFromReceive)(uint8_t *buffer, uint16_t byteCount, void *)=nullptr)
    Start to receive and transmit I2S data.
    Definition: stm32-i2s.h:257
    +
    stm32_i2s::Stm32I2sClass::i2s_begin
    bool i2s_begin()
    Starts the i2s processing.
    Definition: stm32-i2s.h:396
    +
    stm32_i2s::Stm32I2sClass::setupDMA
    void setupDMA(DMA_HandleTypeDef &dma, DMA_Stream_TypeDef *instance, uint32_t channel, uint32_t direction)
    DMA Initialization This function configures and initializes the DMA.
    Definition: stm32-i2s.h:518
    +
    stm32_i2s::Stm32I2sClass::cb_dmaIrqRx
    void cb_dmaIrqRx()
    Callback for DMA interrupt request.
    Definition: stm32-i2s.h:380
    stm32_i2s::I2SPinFunction
    I2SPinFunction
    i2s pin function used as documentation
    Definition: stm32-i2s.h:44
    -
    stm32_i2s::HardwareConfig
    Processor specific settings that are needed to set up I2S.
    Definition: stm32-i2s.h:103
    +
    stm32_i2s::HardwareConfig
    Processor specific settings that are needed to set up I2S.
    Definition: stm32-i2s.h:99
    stm32_i2s::I2SPin
    Define individual Pin. This is used to set up processor specific arrays with all I2S pins and to setu...
    Definition: stm32-i2s.h:53
    stm32_i2s::I2SPin::end
    void end()
    Undo the current pin function.
    Definition: stm32-i2s.h:70
    stm32_i2s::I2SSettingsSTM32
    Currently supported parameters.
    Definition: stm32-i2s.h:131
    diff --git a/docs/html/structstm32__i2s_1_1_hardware_config-members.html b/docs/html/structstm32__i2s_1_1_hardware_config-members.html index 71957da..c981ba1 100644 --- a/docs/html/structstm32__i2s_1_1_hardware_config-members.html +++ b/docs/html/structstm32__i2s_1_1_hardware_config-members.html @@ -72,11 +72,11 @@

    This is the complete list of members for stm32_i2s::HardwareConfig, including all inherited members.

    - - - - - + + + + + diff --git a/docs/html/structstm32__i2s_1_1_hardware_config.html b/docs/html/structstm32__i2s_1_1_hardware_config.html index 2e4aaff..0f8d2e9 100644 --- a/docs/html/structstm32__i2s_1_1_hardware_config.html +++ b/docs/html/structstm32__i2s_1_1_hardware_config.html @@ -89,9 +89,6 @@ - - @@ -116,6 +113,9 @@ + +
    HardwareConfig() (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfiginline
    irq1 (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    irq2 (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    pins (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    pllm (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    buffer_size (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    HardwareConfig() (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfiginline
    irq1 (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    irq2 (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    pins (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    plln (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    pllr (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    rx_channel (defined in stm32_i2s::HardwareConfig)stm32_i2s::HardwareConfig
    uint32_t plln = PLLN
     
    -uint32_t pllm = PLLM
     
    uint32_t pllr = PLLR
     
    I2SPin pins [5] = STM_I2S_PINS
     
    +int buffer_size = 512
     

    Detailed Description

    Processor specific settings that are needed to set up I2S.

    diff --git a/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32-members.html b/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32-members.html index bffc492..2e07a13 100644 --- a/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32-members.html +++ b/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32-members.html @@ -72,9 +72,11 @@

    This is the complete list of members for stm32_i2s::I2SSettingsSTM32, including all inherited members.

    - - - + + + + +
    fullduplexmode (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    hardware_config (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    mode (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    data_format (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    fullduplexmode (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    hardware_config (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    mode (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    ref (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    sample_rate (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    standard (defined in stm32_i2s::I2SSettingsSTM32)stm32_i2s::I2SSettingsSTM32
    diff --git a/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32.html b/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32.html index 4c5d36a..3775af4 100644 --- a/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32.html +++ b/docs/html/structstm32__i2s_1_1_i2_s_settings_s_t_m32.html @@ -92,9 +92,15 @@ uint32_t sample_rate = I2S_AUDIOFREQ_44K   + +uint32_t data_format = I2S_DATAFORMAT_16B +  HardwareConfig hardware_config   + +void * ref = nullptr + 

    Detailed Description

    Currently supported parameters.