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decode.c
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/****************************************************************************
*
* Realmode X86 Emulator Library
*
* Copyright (c) 1996-1999 SciTech Software, Inc.
* Copyright (c) David Mosberger-Tang
* Copyright (c) 1999 Egbert Eich
* Copyright (c) 2007-2017 SUSE LINUX GmbH; Author: Steffen Winterfeldt
*
* ========================================================================
*
* Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
* ========================================================================
*
* Description:
* Subroutines related to instruction decoding and logging.
*
****************************************************************************/
#include "include/x86emu_int.h"
#include <time.h>
/*----------------------------- Implementation ----------------------------*/
static void handle_interrupt(x86emu_t *emu);
static void generate_int(x86emu_t *emu, u8 nr, unsigned type, unsigned errcode);
#ifdef X86EMU_ENABLE_LOGGING
static void log_regs(x86emu_t *emu);
static void log_code(x86emu_t *emu);
#endif
static void check_data_access(x86emu_t *emu, sel_t *seg, u32 ofs, u32 size);
static unsigned decode_memio(x86emu_t *emu, u32 addr, u32 *val, unsigned type);
static unsigned emu_memio(x86emu_t *emu, u32 addr, u32 *val, unsigned type);
static void idt_lookup(x86emu_t *emu, u8 nr, u32 *new_cs, u32 *new_eip);
/****************************************************************************
REMARKS:
Main execution loop for the emulator. We return from here when the system
halts, timeouts, or one of the conditions in flags are met.
****************************************************************************/
API_SYM unsigned x86emu_run(x86emu_t *emu, unsigned flags)
{
u8 op1, u_m1;
s32 ofs32;
#ifdef X86EMU_ENABLE_LOGGING
char **p;
#endif
unsigned u, rs = 0;
time_t t0;
int has_prefix;
#if WITH_TSC
u64 tsc_ofs;
#endif
#ifdef X86EMU_ENABLE_LOGGING
p = &emu->log.ptr;
#endif
t0 = time(NULL);
#if WITH_TSC
tsc_ofs = tsc() - emu->x86.R_REAL_TSC;
#endif
#if WITH_IOPL
emu->io.iopl_ok = emu->io.iopl_needed && getiopl() != 3 ? 0 : 1;
#else
emu->io.iopl_ok = 1;
#endif
for(;;) {
#ifdef X86EMU_ENABLE_DISASSEMBLY
*(emu->x86.disasm_ptr = emu->x86.disasm_buf) = 0;
#endif
emu->x86.instr_len = 0;
emu->x86.mode = 0;
if(ACC_D(emu->x86.R_CS_ACC)) {
emu->x86.mode |= _MODE_DATA32 | _MODE_ADDR32 | _MODE_CODE32;
}
if(ACC_D(emu->x86.R_SS_ACC)) {
emu->x86.mode |= _MODE_STACK32;
}
emu->x86.default_seg = NULL;
/* save EIP and CS values */
emu->x86.saved_cs = emu->x86.R_CS;
emu->x86.saved_eip = emu->x86.R_EIP;
#ifdef X86EMU_ENABLE_LOGGING
log_regs(emu);
#endif
if(
(flags & X86EMU_RUN_MAX_INSTR) &&
emu->max_instr &&
emu->x86.R_TSC >= emu->max_instr
) {
rs |= X86EMU_RUN_MAX_INSTR;
break;
}
if(
(flags & X86EMU_RUN_TIMEOUT) &&
emu->timeout &&
!(emu->x86.R_TSC & 0xffff) &&
time(NULL) - t0 > emu->timeout
) {
rs |= X86EMU_RUN_TIMEOUT;
break;
}
if(emu->code_check) {
if((*emu->code_check)(emu) || MODE_HALTED) {
rs |= X86EMU_RUN_NO_CODE;
break;
}
}
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "[", 1);
#endif
/* handle prefixes here */
has_prefix = 1;
while(has_prefix) {
switch(op1 = fetch_byte(emu)) {
case 0x26:
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "es:[", 4);
#endif
emu->x86.default_seg = emu->x86.seg + R_ES_INDEX;
break;
case 0x2e:
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "cs:[", 4);
#endif
emu->x86.default_seg = emu->x86.seg + R_CS_INDEX;
break;
case 0x36:
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "ss:[", 4);
#endif
emu->x86.default_seg = emu->x86.seg + R_SS_INDEX;
break;
case 0x3e:
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "ds:[", 4);
#endif
emu->x86.default_seg = emu->x86.seg + R_DS_INDEX;
break;
case 0x64:
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "fs:[", 4);
#endif
emu->x86.default_seg = emu->x86.seg + R_FS_INDEX;
break;
case 0x65:
#ifdef X86EMU_ENABLE_DISASSEMBLY
memcpy(emu->x86.decode_seg, "gs:[", 4);
#endif
emu->x86.default_seg = emu->x86.seg + R_GS_INDEX;
break;
case 0x66:
emu->x86.mode ^= _MODE_DATA32;
break;
case 0x67:
emu->x86.mode ^= _MODE_ADDR32;
break;
case 0xf0:
OP_DECODE("lock: ");
break;
case 0xf2:
OP_DECODE("repne ");
emu->x86.mode |= _MODE_REPNE;
break;
case 0xf3:
OP_DECODE("repe ");
emu->x86.mode |= _MODE_REPE;
break;
default:
has_prefix = 0;
break;
}
}
if(MODE_HALTED) {
rs |= X86EMU_RUN_NO_EXEC;
emu->x86.R_EIP = emu->x86.saved_eip;
break;
}
if(flags & X86EMU_RUN_LOOP) {
u = emu->x86.R_CS_BASE + emu->x86.R_EIP;
ofs32 = 0;
if(op1 == 0xeb) {
ofs32 = (s32) (s8) x86emu_read_byte_noperm(emu, u) + 1;
}
else if(op1 == 0xe9) {
if(MODE_DATA32) {
ofs32 = (x86emu_read_byte_noperm(emu, u) +
(x86emu_read_byte_noperm(emu, u + 1) << 8)) +
(x86emu_read_byte_noperm(emu, u + 2) << 16) +
(x86emu_read_byte_noperm(emu, u + 3) << 24) + 4;
}
else {
ofs32 = (s32) (s16) (
x86emu_read_byte_noperm(emu, u) +
(x86emu_read_byte_noperm(emu, u + 1) << 8)) + 2;
}
}
if(ofs32) {
if(emu->x86.R_EIP + ofs32 == emu->x86.saved_eip) {
rs |= X86EMU_RUN_LOOP;
}
else if(emu->x86.R_EIP + 1 + ofs32 == emu->x86.saved_eip && emu->x86.saved_eip >= 1) {
u_m1 = x86emu_read_byte_noperm(emu, emu->x86.R_CS_BASE + emu->x86.saved_eip - 1);
if(u_m1 >= 0xf8 && u_m1 <= 0xfd) rs |= X86EMU_RUN_LOOP;
}
if(rs) x86emu_stop(emu);
}
}
if(flags & X86EMU_RUN_NO_CODE) {
u = emu->x86.R_CS_BASE + emu->x86.R_EIP;
if(emu->x86.mode == 0 && op1 == 0x00 && x86emu_read_byte_noperm(emu, u) == 0x00) {
rs |= X86EMU_RUN_NO_CODE;
}
if(rs) x86emu_stop(emu);
}
(*x86emu_optab[op1])(emu, op1);
#ifdef X86EMU_ENABLE_DISASSEMBLY
*emu->x86.disasm_ptr = 0;
#endif
handle_interrupt(emu);
#if WITH_TSC
emu->x86.R_LAST_REAL_TSC = emu->x86.R_REAL_TSC;
emu->x86.R_REAL_TSC = tsc() - tsc_ofs;
#endif
#ifdef X86EMU_ENABLE_LOGGING
log_code(emu);
if(emu->x86.debug_len) {
emu_process_debug(emu, emu->x86.debug_start, emu->x86.debug_len);
emu->x86.debug_len = emu->x86.debug_start = 0;
}
#endif
emu->x86.R_TSC++; // time stamp counter
if(MODE_HALTED) break;
}
#ifdef X86EMU_ENABLE_LOGGING
if(*p) {
if((rs & X86EMU_RUN_TIMEOUT)) {
LOG_STR("* timeout\n");
}
if((rs & X86EMU_RUN_MAX_INSTR)) {
LOG_STR("* too many instructions\n");
}
if((rs & X86EMU_RUN_NO_EXEC)) {
LOG_STR("* memory not executable\n");
}
if((rs & X86EMU_RUN_NO_CODE)) {
LOG_STR("* no proper code\n");
}
if((rs & X86EMU_RUN_LOOP)) {
LOG_STR("* infinite loop\n");
}
**p = 0;
}
#endif
#if WITH_TSC
emu->x86.R_REAL_TSC = tsc() - tsc_ofs;
#endif
return rs;
}
/****************************************************************************
REMARKS:
Halts the system by setting the halted system flag.
****************************************************************************/
API_SYM void x86emu_stop(x86emu_t *emu)
{
emu->x86.mode |= _MODE_HALTED;
}
/****************************************************************************
REMARKS:
Handles any pending asychronous interrupts.
****************************************************************************/
void handle_interrupt(x86emu_t *emu)
{
#ifdef X86EMU_ENABLE_LOGGING
char **p = &emu->log.ptr;
unsigned lf;
#endif
if(emu->x86.intr_type) {
#ifdef X86EMU_ENABLE_LOGGING
if((emu->log.trace & X86EMU_TRACE_INTS) && *p) {
lf = LOG_FREE(emu);
if(lf < 128) lf = x86emu_clear_log(emu, 1);
if(lf >= 128) {
if((emu->x86.intr_type & 0xff) == INTR_TYPE_FAULT) {
LOG_STR("* fault ");
}
else {
LOG_STR("* int ");
}
decode_hex2(emu, p, emu->x86.intr_nr & 0xff);
LOG_STR("\n");
**p = 0;
}
}
#endif
generate_int(emu, emu->x86.intr_nr, emu->x86.intr_type, emu->x86.intr_errcode);
}
emu->x86.intr_type = 0;
}
API_SYM void x86emu_intr_raise(x86emu_t *emu, u8 intr_nr, unsigned type, unsigned err)
{
if(emu && !emu->x86.intr_type) {
emu->x86.intr_nr = intr_nr;
emu->x86.intr_type = type;
emu->x86.intr_errcode = err;
}
}
/****************************************************************************
PARAMETERS:
mod - Mod value from decoded byte
regh - Reg h value from decoded byte
regl - Reg l value from decoded byte
REMARKS:
Raise the specified interrupt to be handled before the execution of the
next instruction.
****************************************************************************/
void fetch_decode_modrm(x86emu_t *emu, int *mod, int *regh, int *regl)
{
u8 fetched;
fetched = fetch_byte(emu);
*mod = (fetched >> 6) & 0x03;
*regh = (fetched >> 3) & 0x07;
*regl = (fetched >> 0) & 0x07;
}
/****************************************************************************
RETURNS:
Immediate byte value read from instruction queue
REMARKS:
This function returns the immediate byte from the instruction queue, and
moves the instruction pointer to the next value.
****************************************************************************/
u8 fetch_byte(x86emu_t *emu)
{
u32 val;
unsigned err;
err = decode_memio(emu, emu->x86.R_CS_BASE + emu->x86.R_EIP, &val, X86EMU_MEMIO_8 + X86EMU_MEMIO_X);
if(err) x86emu_stop(emu);
if(MODE_CODE32) {
emu->x86.R_EIP++;
}
else {
emu->x86.R_IP++;
}
if(emu->x86.instr_len < sizeof emu->x86.instr_buf) {
emu->x86.instr_buf[emu->x86.instr_len++] = val;
}
return val;
}
/****************************************************************************
RETURNS:
Immediate word value read from instruction queue
REMARKS:
This function returns the immediate byte from the instruction queue, and
moves the instruction pointer to the next value.
****************************************************************************/
u16 fetch_word(x86emu_t *emu)
{
u32 val;
unsigned err;
err = decode_memio(emu, emu->x86.R_CS_BASE + emu->x86.R_EIP, &val, X86EMU_MEMIO_16 + X86EMU_MEMIO_X);
if(err) x86emu_stop(emu);
if(MODE_CODE32) {
emu->x86.R_EIP += 2;
}
else {
emu->x86.R_IP += 2;
}
if(emu->x86.instr_len + 1 < sizeof emu->x86.instr_buf) {
emu->x86.instr_buf[emu->x86.instr_len++] = val;
emu->x86.instr_buf[emu->x86.instr_len++] = val >> 8;
}
return val;
}
/****************************************************************************
RETURNS:
Immediate lone value read from instruction queue
REMARKS:
This function returns the immediate byte from the instruction queue, and
moves the instruction pointer to the next value.
****************************************************************************/
u32 fetch_long(x86emu_t *emu)
{
u32 val;
unsigned err;
err = decode_memio(emu, emu->x86.R_CS_BASE + emu->x86.R_EIP, &val, X86EMU_MEMIO_32 + X86EMU_MEMIO_X);
if(err) x86emu_stop(emu);
if(MODE_CODE32) {
emu->x86.R_EIP += 4;
}
else {
emu->x86.R_IP += 4;
}
if(emu->x86.instr_len + 3 < sizeof emu->x86.instr_buf) {
emu->x86.instr_buf[emu->x86.instr_len++] = val;
emu->x86.instr_buf[emu->x86.instr_len++] = val >> 8;
emu->x86.instr_buf[emu->x86.instr_len++] = val >> 16;
emu->x86.instr_buf[emu->x86.instr_len++] = val >> 24;
}
return val;
}
/****************************************************************************
RETURNS:
Value of the default data segment
REMARKS:
Inline function that returns the default data segment for the current
instruction.
On the x86 processor, the default segment is not always DS if there is
no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to
addresses relative to SS (ie: on the stack). So, at the minimum, all
decodings of addressing modes would have to set/clear a bit describing
whether the access is relative to DS or SS. That is the function of the
cpu-state-varible emu->x86.mode. There are several potential states:
repe prefix seen (handled elsewhere)
repne prefix seen (ditto)
cs segment override
ds segment override
es segment override
fs segment override
gs segment override
ss segment override
ds/ss select (in absense of override)
Each of the above 7 items are handled with a bit in the mode field.
****************************************************************************/
static sel_t *get_data_segment(x86emu_t *emu)
{
sel_t *seg;
if(!(seg = emu->x86.default_seg)) {
seg = emu->x86.seg + (emu->x86.mode & _MODE_SEG_DS_SS ? R_SS_INDEX : R_DS_INDEX);
}
return seg;
}
/****************************************************************************
PARAMETERS:
offset - Offset to load data from
RETURNS:
Byte value read from the absolute memory location.
****************************************************************************/
u8 fetch_data_byte(x86emu_t *emu, u32 ofs)
{
return fetch_data_byte_abs(emu, get_data_segment(emu), ofs);
}
/****************************************************************************
PARAMETERS:
offset - Offset to load data from
RETURNS:
Word value read from the absolute memory location.
****************************************************************************/
u16 fetch_data_word(x86emu_t *emu, u32 ofs)
{
return fetch_data_word_abs(emu, get_data_segment(emu), ofs);
}
/****************************************************************************
PARAMETERS:
offset - Offset to load data from
RETURNS:
Long value read from the absolute memory location.
****************************************************************************/
u32 fetch_data_long(x86emu_t *emu, u32 ofs)
{
return fetch_data_long_abs(emu, get_data_segment(emu), ofs);
}
/****************************************************************************
PARAMETERS:
offset - Offset to load data from
RETURNS:
Quad long value read from the absolute memory location.
****************************************************************************/
I128_reg_t fetch_data_qlong(x86emu_t *emu, u32 ofs)
{
I128_reg_t ret;
int i;
for (i = 0; i < sizeof(I128_reg_t); i++) {
ret.reg[i] = fetch_data_byte(emu, ofs + i);
}
return ret;
}
/****************************************************************************
PARAMETERS:
segment - Segment to load data from
offset - Offset to load data from
RETURNS:
Byte value read from the absolute memory location.
****************************************************************************/
u8 fetch_data_byte_abs(x86emu_t *emu, sel_t *seg, u32 ofs)
{
u32 val;
check_data_access(emu, seg, ofs, 1);
decode_memio(emu, seg->base + ofs, &val, X86EMU_MEMIO_8 + X86EMU_MEMIO_R);
return val;
}
/****************************************************************************
PARAMETERS:
segment - Segment to load data from
offset - Offset to load data from
RETURNS:
Word value read from the absolute memory location.
****************************************************************************/
u16 fetch_data_word_abs(x86emu_t *emu, sel_t *seg, u32 ofs)
{
u32 val;
check_data_access(emu, seg, ofs, 2);
decode_memio(emu, seg->base + ofs, &val, X86EMU_MEMIO_16 + X86EMU_MEMIO_R);
return val;
}
/****************************************************************************
PARAMETERS:
segment - Segment to load data from
offset - Offset to load data from
RETURNS:
Long value read from the absolute memory location.
****************************************************************************/
u32 fetch_data_long_abs(x86emu_t *emu, sel_t *seg, u32 ofs)
{
u32 val;
check_data_access(emu, seg, ofs, 4);
decode_memio(emu, seg->base + ofs, &val, X86EMU_MEMIO_32 + X86EMU_MEMIO_R);
return val;
}
/****************************************************************************
PARAMETERS:
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a word value to an segmented memory location. The segment used is
the current 'default' segment, which may have been overridden.
****************************************************************************/
void store_data_byte(x86emu_t *emu, u32 ofs, u8 val)
{
store_data_byte_abs(emu, get_data_segment(emu), ofs, val);
}
/****************************************************************************
PARAMETERS:
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a word value to an segmented memory location. The segment used is
the current 'default' segment, which may have been overridden.
****************************************************************************/
void store_data_word(x86emu_t *emu, u32 ofs, u16 val)
{
store_data_word_abs(emu, get_data_segment(emu), ofs, val);
}
/****************************************************************************
PARAMETERS:
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a long value to an segmented memory location. The segment used is
the current 'default' segment, which may have been overridden.
****************************************************************************/
void store_data_long(x86emu_t *emu, u32 ofs, u32 val)
{
store_data_long_abs(emu, get_data_segment(emu), ofs, val);
}
/****************************************************************************
PARAMETERS:
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a qlong value to an segmented memory location. The segment used is
the current 'default' segment, which may have been overridden.
****************************************************************************/
void store_data_qlong(x86emu_t *emu, u32 ofs, I128_reg_t val)
{
int i;
for (i = 0; i < sizeof(I128_reg_t); i++) {
store_data_word_abs(emu, get_data_segment(emu), ofs, val.reg[i]);
}
}
/****************************************************************************
PARAMETERS:
segment - Segment to store data at
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a byte value to an absolute memory location.
****************************************************************************/
void store_data_byte_abs(x86emu_t *emu, sel_t *seg, u32 ofs, u8 val)
{
u32 val32 = val;
check_data_access(emu, seg, ofs, 1);
decode_memio(emu, seg->base + ofs, &val32, X86EMU_MEMIO_8 + X86EMU_MEMIO_W);
}
/****************************************************************************
PARAMETERS:
segment - Segment to store data at
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a word value to an absolute memory location.
****************************************************************************/
void store_data_word_abs(x86emu_t *emu, sel_t *seg, u32 ofs, u16 val)
{
u32 val32 = val;
check_data_access(emu, seg, ofs, 2);
decode_memio(emu, seg->base + ofs, &val32, X86EMU_MEMIO_16 + X86EMU_MEMIO_W);
}
/****************************************************************************
PARAMETERS:
segment - Segment to store data at
offset - Offset to store data at
val - Value to store
REMARKS:
Writes a long value to an absolute memory location.
****************************************************************************/
void store_data_long_abs(x86emu_t *emu, sel_t *seg, u32 ofs, u32 val)
{
check_data_access(emu, seg, ofs, 4);
decode_memio(emu, seg->base + ofs, &val, X86EMU_MEMIO_32 + X86EMU_MEMIO_W);
}
u8 fetch_io_byte(x86emu_t *emu, u32 port)
{
u32 val;
decode_memio(emu, port, &val, X86EMU_MEMIO_8 + X86EMU_MEMIO_I);
return val;
}
u16 fetch_io_word(x86emu_t *emu, u32 port)
{
u32 val;
decode_memio(emu, port, &val, X86EMU_MEMIO_16 + X86EMU_MEMIO_I);
return val;
}
u32 fetch_io_long(x86emu_t *emu, u32 port)
{
u32 val;
decode_memio(emu, port, &val, X86EMU_MEMIO_32 + X86EMU_MEMIO_I);
return val;
}
void store_io_byte(x86emu_t *emu, u32 port, u8 val)
{
u32 val32 = val;
decode_memio(emu, port, &val32, X86EMU_MEMIO_8 + X86EMU_MEMIO_O);
}
void store_io_word(x86emu_t *emu, u32 port, u16 val)
{
u32 val32 = val;
decode_memio(emu, port, &val32, X86EMU_MEMIO_16 + X86EMU_MEMIO_O);
}
void store_io_long(x86emu_t *emu, u32 port, u32 val)
{
decode_memio(emu, port, &val, X86EMU_MEMIO_32 + X86EMU_MEMIO_O);
}
/****************************************************************************
PARAMETERS:
reg - Register to decode
RETURNS:
Pointer to the appropriate register
REMARKS:
Return a pointer to the register given by the R/RM field of the
modrm byte, for byte operands. Also enables the decoding of instructions.
****************************************************************************/
u8* decode_rm_byte_register(x86emu_t *emu, int reg)
{
switch(reg) {
case 0:
OP_DECODE("al");
return &emu->x86.R_AL;
case 1:
OP_DECODE("cl");
return &emu->x86.R_CL;
case 2:
OP_DECODE("dl");
return &emu->x86.R_DL;
case 3:
OP_DECODE("bl");
return &emu->x86.R_BL;
case 4:
OP_DECODE("ah");
return &emu->x86.R_AH;
case 5:
OP_DECODE("ch");
return &emu->x86.R_CH;
case 6:
OP_DECODE("dh");
return &emu->x86.R_DH;
case 7:
OP_DECODE("bh");
return &emu->x86.R_BH;
}
return NULL; /* NOT REACHED OR REACHED ON ERROR */
}
/****************************************************************************
PARAMETERS:
reg - Register to decode
RETURNS:
Pointer to the appropriate register
REMARKS:
Return a pointer to the register given by the R/RM field of the
modrm byte, for word operands. Also enables the decoding of instructions.
****************************************************************************/
u16* decode_rm_word_register(x86emu_t *emu, int reg)
{
switch(reg) {
case 0:
OP_DECODE("ax");
return &emu->x86.R_AX;
case 1:
OP_DECODE("cx");
return &emu->x86.R_CX;
case 2:
OP_DECODE("dx");
return &emu->x86.R_DX;
case 3:
OP_DECODE("bx");
return &emu->x86.R_BX;
case 4:
OP_DECODE("sp");
return &emu->x86.R_SP;
case 5:
OP_DECODE("bp");
return &emu->x86.R_BP;
case 6:
OP_DECODE("si");
return &emu->x86.R_SI;
case 7:
OP_DECODE("di");
return &emu->x86.R_DI;
}
return NULL; /* NOTREACHED OR REACHED ON ERROR */
}
/****************************************************************************
PARAMETERS:
reg - Register to decode
RETURNS:
Pointer to the appropriate register
REMARKS:
Return a pointer to the register given by the R/RM field of the
modrm byte, for dword operands. Also enables the decoding of instructions.
****************************************************************************/
u32* decode_rm_long_register(x86emu_t *emu, int reg)
{
switch(reg) {
case 0:
OP_DECODE("eax");
return &emu->x86.R_EAX;
case 1:
OP_DECODE("ecx");
return &emu->x86.R_ECX;
case 2:
OP_DECODE("edx");
return &emu->x86.R_EDX;
case 3:
OP_DECODE("ebx");
return &emu->x86.R_EBX;
case 4:
OP_DECODE("esp");
return &emu->x86.R_ESP;
case 5:
OP_DECODE("ebp");
return &emu->x86.R_EBP;
case 6:
OP_DECODE("esi");
return &emu->x86.R_ESI;
case 7:
OP_DECODE("edi");
return &emu->x86.R_EDI;
}
return NULL; /* NOTREACHED OR REACHED ON ERROR */
}
#ifdef X86EMU_ENABLE_SSE_EMULATION
/****************************************************************************
PARAMETERS:
reg - SSE register to decode
RETURNS:
Pointer to the appropriate register
REMARKS:
Return a pointer to the register given by the R/RM field of the
modrm byte, for dword operands. Also enables the decoding of instructions.
****************************************************************************/
I128_reg_t* decode_rm_sse_register(x86emu_t *emu, int reg)
{
switch(reg) {
case 0:
OP_DECODE("xmm0");
return &emu->x86.R_XMM0;
case 1:
OP_DECODE("xmm1");
return &emu->x86.R_XMM1;
case 2:
OP_DECODE("xmm2");
return &emu->x86.R_XMM2;
case 3:
OP_DECODE("xmm3");
return &emu->x86.R_XMM3;
case 4:
OP_DECODE("xmm4");
return &emu->x86.R_XMM4;
case 5:
OP_DECODE("xmm5");
return &emu->x86.R_XMM5;
case 6:
OP_DECODE("xmm6");
return &emu->x86.R_XMM6;
case 7:
OP_DECODE("xmm7");
return &emu->x86.R_XMM7;
}
return NULL; /* NOTREACHED OR REACHED ON ERROR */